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# see http://clang.llvm.org/docs/ClangFormatStyleOptions.html | ||
# BasedOnStyle: LLVM | ||
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AccessModifierOffset: -2 | ||
AlignEscapedNewlines: Left | ||
AllowShortFunctionsOnASingleLine: Inline | ||
AllowShortIfStatementsOnASingleLine: false | ||
AlwaysBreakTemplateDeclarations: true | ||
BreakBeforeBraces: Allman | ||
BreakConstructorInitializersBeforeComma: true | ||
ColumnLimit: 120 | ||
ConstructorInitializerAllOnOneLineOrOnePerLine: true | ||
Cpp11BracedListStyle: false | ||
IndentCaseLabels: false | ||
IndentWidth: 4 | ||
KeepEmptyLinesAtTheStartOfBlocks: true | ||
MaxEmptyLinesToKeep: 1 | ||
PenaltyReturnTypeOnItsOwnLine: 10000 | ||
PointerBindsToType: false | ||
SortIncludes: false | ||
UseTab: Never | ||
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[Dolphin] | ||
Timestamp=2019,8,20,16,31,53 | ||
Version=3 | ||
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[Settings] | ||
HiddenFilesShown=true |
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# Prerequisites | ||
*.d | ||
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# Compiled Object files | ||
*.slo | ||
*.lo | ||
*.o | ||
*.obj | ||
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# Precompiled Headers | ||
*.gch | ||
*.pch | ||
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# Compiled Dynamic libraries | ||
*.so | ||
*.dylib | ||
*.dll | ||
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# Fortran module files | ||
*.mod | ||
*.smod | ||
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# Compiled Static libraries | ||
*.lai | ||
*.la | ||
*.a | ||
*.lib | ||
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# Executables | ||
*.exe | ||
*.out | ||
*.app | ||
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# build artifacts | ||
**/build/ | ||
**/b/ | ||
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# IDE files | ||
.vscode | ||
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# Temporaries | ||
*~ |
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# ------------------- ETISS CI flow -------------------------- | ||
# Build process is written in shell | ||
# Testers are written in python for easily plugging in new tester | ||
# All script is located in ./ci directory | ||
# -------------------------------------------------------------- | ||
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image: gitlab.lrz.de:5005/de-tum-ei-eda-esl/etiss:latest | ||
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stages: | ||
- build | ||
- test | ||
- gdbtest | ||
- deploy | ||
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#before_script: | ||
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Build: | ||
stage: build | ||
script: | ||
- whoami | ||
- echo $HOME | ||
- sh ./ci/build.sh | ||
cache: | ||
key: build_cache | ||
paths: | ||
- "build_dir" | ||
- "ci/tester.log" | ||
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# Manually re-build project in GitLab GUI | ||
ReBuild: | ||
stage: build | ||
script: | ||
- rm -rf build_dir | ||
- sh ./ci/build.sh | ||
cache: | ||
key: build_cache | ||
paths: | ||
- "build_dir" | ||
when: manual | ||
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FailuerHandling: | ||
stage: test | ||
script: | ||
- rm -rf build_dir | ||
when: manual | ||
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Or1kTester: | ||
stage: test | ||
script: | ||
- cd ci | ||
- python3 Tester.py -arch Or1k | ||
- cd .. | ||
# only: | ||
# - master | ||
# - '/.*[oO][rR]1[kK].*/' | ||
cache: | ||
key: build_cache | ||
paths: | ||
- "build_dir" | ||
- "ci/tester.log" | ||
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dependencies: | ||
- Build | ||
artifacts: | ||
paths: | ||
- "ci/tester.log" | ||
expire_in: 2 weeks | ||
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RiscvTester: | ||
stage: test | ||
script: | ||
- cd ci | ||
- python3 Tester.py -arch RISCV | ||
- cd .. | ||
# only: | ||
# - master | ||
# - '/.*[rR][iI][sS][cC]-?_?[vV].*/' | ||
cache: | ||
key: build_cache | ||
paths: | ||
- "build_dir" | ||
- "ci/tester.log" | ||
dependencies: | ||
- Build | ||
artifacts: | ||
paths: | ||
- "ci/tester.log" | ||
expire_in: 2 weeks | ||
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# Testers in the following are architecture specific testers. | ||
# Note: Use the following part for testing ARM if available | ||
#Armv6MTester: | ||
# stage: test | ||
# script: | ||
# - cd ci | ||
# - python3 Tester.py -arch Armv6M | ||
# - cd .. | ||
# only: | ||
# - master | ||
# - '/.*[aA][rR][mM][vV]?6?[mM]?.*/' | ||
# cache: | ||
# key: build_cache | ||
# paths: | ||
# - "build_dir" | ||
# - "ci/tester.log" | ||
# dependencies: | ||
# - Build | ||
# artifacts: | ||
# paths: | ||
# - "ci/tester.log" | ||
# expire_in: 2 weeks | ||
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Or1kGDBTester: | ||
stage: gdbtest | ||
script: | ||
- cd ci | ||
- python3 Tester.py -arch Or1k -gdb | ||
- cd .. | ||
cache: | ||
key: build_cache | ||
paths: | ||
- "build_dir" | ||
- "ci/tester.log" | ||
# only: | ||
# - master | ||
# - '/.*[oO][rR]1[kK].*/' | ||
dependencies: | ||
- Or1kTester | ||
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RiscvGDBTester: | ||
stage: gdbtest | ||
script: | ||
- cd ci | ||
- python3 Tester.py -arch RISCV -gdb | ||
cache: | ||
key: build_cache | ||
paths: | ||
- "build_dir" | ||
- "ci/tester.log" | ||
# only: | ||
# - master | ||
# - '/.*[rR][iI][sS][cC]-?_?[vV].*/' | ||
dependencies: | ||
- RiscvTester | ||
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# Note: use this part for testing ARM if available. | ||
#Armv6MGDBTester: | ||
# stage: gdbtest | ||
# script: | ||
# - cd ci | ||
# - python3 Tester.py -arch Armv6M -gdb | ||
# - cd .. | ||
# cache: | ||
# key: build_cache | ||
# paths: | ||
# - "build_dir" | ||
# - "ci/tester.log" | ||
# only: | ||
# - master | ||
# - '/.*[aA][rR][mM][vV]?6?[mM]?.*/' | ||
# dependencies: | ||
# - Armv6MTester | ||
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CITester: | ||
stage: test | ||
script: | ||
- cd ci | ||
- python3 Tester.py | ||
- cd .. | ||
only: | ||
- CI_dev | ||
cache: | ||
key: build_cache | ||
paths: | ||
- "build_dir" | ||
- "ci/tester.log" | ||
dependencies: | ||
- Build | ||
artifacts: | ||
paths: | ||
- "ci/tester.log" | ||
expire_in: 2 weeks | ||
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Deploy: | ||
stage: deploy | ||
script: | ||
- echo "Not implemented" | ||
cache: | ||
key: build_cache | ||
paths: | ||
- "build_dir" | ||
- "ci/tester.log" | ||
when: manual | ||
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deploy docker container: | ||
stage: build | ||
when: manual | ||
script: | ||
- cd ci | ||
- docker build -t gitlab.lrz.de:5005/de-tum-ei-eda-esl/etiss . | ||
- docker login -u gitlab-ci-token -p $CI_BUILD_TOKEN gitlab.lrz.de:5005/de-tum-ei-eda-esl/etiss | ||
- docker push gitlab.lrz.de:5005/de-tum-ei-eda-esl/etiss |
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[submodule "PluginImpl/verilator"] | ||
path = PluginImpl/verilator | ||
url = [email protected]:de-tum-ei-eda-esl/etiss-plugin-verilator.git | ||
branch = master |
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# | ||
# Copyright 2018 Infineon Technologies AG | ||
# | ||
# This file is part of ETISS tool, see <https://gitlab.lrz.de/de-tum-ei-eda-open/etiss> | ||
# | ||
# The initial version of this software has been created with the funding support by the German Federal | ||
# Ministry of Education and Research(BMBF) in the project EffektiV under grant 01IS13022. | ||
# | ||
# Redistribution and use in source and binary forms, with or without modification, are permitted | ||
# provided that the following conditions are met: | ||
# | ||
# 1. Redistributions of source code must retain the above copyright notice, this list of conditions and | ||
# the following disclaimer. | ||
# | ||
# 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions | ||
# and the following disclaimer in the documentation and / or other materials provided with the distribution. | ||
# | ||
# 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse | ||
# or promote products derived from this software without specific prior written permission. | ||
# | ||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED | ||
# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A | ||
# PARTICULAR PURPOSE ARE DISCLAIMED.IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY | ||
# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, BUT NOT LIMITED TO, | ||
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||
# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT(INCLUDING | ||
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | ||
# POSSIBILITY OF SUCH DAMAGE. | ||
# | ||
# | ||
# Author: Marc Greim <[email protected]>, Chair of Electronic Design Automation, TUM | ||
# | ||
# Version 0.1 | ||
# | ||
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#ADD_SUBDIRECTORY(ARMv6M) | ||
ADD_SUBDIRECTORY(OR1K) | ||
ADD_SUBDIRECTORY(RISCV) | ||
ADD_SUBDIRECTORY(RISCV64) |
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# | ||
# Copyright 2018 Infineon Technologies AG | ||
# | ||
# This file is part of ETISS tool, see <https://gitlab.lrz.de/de-tum-ei-eda-open/etiss> | ||
# | ||
# The initial version of this software has been created with the funding support by the German Federal | ||
# Ministry of Education and Research(BMBF) in the project EffektiV under grant 01IS13022. | ||
# | ||
# Redistribution and use in source and binary forms, with or without modification, are permitted | ||
# provided that the following conditions are met: | ||
# | ||
# 1. Redistributions of source code must retain the above copyright notice, this list of conditions and | ||
# the following disclaimer. | ||
# | ||
# 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions | ||
# and the following disclaimer in the documentation and / or other materials provided with the distribution. | ||
# | ||
# 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse | ||
# or promote products derived from this software without specific prior written permission. | ||
# | ||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED | ||
# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A | ||
# PARTICULAR PURPOSE ARE DISCLAIMED.IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY | ||
# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, BUT NOT LIMITED TO, | ||
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||
# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT(INCLUDING | ||
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | ||
# POSSIBILITY OF SUCH DAMAGE. | ||
# | ||
# | ||
# Author: Marc Greim <[email protected]>, Chair of Electronic Design Automation, TUM | ||
# | ||
# Version 0.1 | ||
# | ||
PROJECT(OR1KArch) | ||
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ADD_LIBRARY(${PROJECT_NAME} SHARED | ||
OR1K_Helper.cpp | ||
OR1K.h | ||
OR1KArch_fpu.cpp | ||
OR1KArch.cpp | ||
OR1KArch.h | ||
OR1KCommonLocal.hpp | ||
OR1KGDBCore.cpp | ||
OR1KGDBCore.h | ||
OR1KTimer.cpp | ||
OR1KTimer.h | ||
OR1200Timing.cpp | ||
ORBIS32_I.cpp | ||
ORBIS32_II.cpp | ||
ORFPX32.cpp | ||
) | ||
# TODO: Rename this project to "OR1K" or all archs to "Arch_XXX". | ||
ETISSPluginArchName(${PROJECT_NAME} "OR1K") |
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