Adding new remixed "v001R" variants, which have either 55 or 64 keys …

…and have minor adjustments to the overall key arrangement. Adding new simplified Xiao Seeed variant. Updated pictures of new boards.
tubbytwins · Jul 17, 2023 · e4ca0a8 · e4ca0a8
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diff --git a/README.md b/README.md
@@ -11,15 +11,31 @@ Credit is given to Pete Johanson for the Xiao footprint, circuit design and othe
 
 This design uses Kailh "Choc" PG1350 key switches.  The board can either be used bare (not recommended) or installed in a case.  I have uploaded a set of PCB case files for a Corne-style board arrangement (with both top plate and bottom plate).  Other case options are still a work in progress.
 
-The board renders for the Waveshare RP2040-zero variant are shown below:
+## Revisions
 
-![](doc/bumwings_v001_board_render.jpg)
+The original designs (labeled as "v001", committed in December 2022 and January 2023) represent my first attmept to create a keyboard PCB design.  I learned several things, including the undeniable fact that relatively large PCBs are somewhat more expensive. 
 
-The board renders for the Xiao Seeed variant are shown below:
+I also learned that my hand-soldering skills were **not** that great.  
 
-![](doc/bumwings_v001_xiao_board_render.jpg)
+These learnings were applied to the "revised" or "remixed" designs (labeled as "v001R", committed in July 2023) which improve on the original "v001" design.  These are in the "v001R" subdirectory.
 
-Here is a picture of my first prototype build:
+## Pictures - Work in Progress
+
+Here is a picture of my first prototype build of the initial "v001" RP2040 variant with 54 keys.  It has Kailh Choc Robin switches (mostly).
 
 ![](doc/bumwings_v001_prototype_first_build.jpg)
 
+Here is a picture of the new "v001R" RP2040 variant with 64 keys.  This is now my "daily driver" keyboard.  It has Kailh Choc Brown switches (mostly).
+
+![](doc/bumwings_v001R64_rp2040zero_build_daily.jpg)
+
+Here are two pictures of the new "v001R" Xiao variant with 64 keys.  This keyboard will be a gift for a friend.  It has Kailh Choc Jade switches (mostly).
+
+![](doc/bumwings_v001R64_xiao_sd_build_wip.jpg)
+![](doc/bumwings_v001R64_xiao_sd_build_keycaps.jpg)
+
+
+
+
+(more pictures coming soon)
+
diff --git a/doc/bumwings_v001R55_rp2040zero_board_render.jpg b/doc/bumwings_v001R55_rp2040zero_board_render.jpg
diff --git a/doc/bumwings_v001R55_xiao_s_board_render.jpg b/doc/bumwings_v001R55_xiao_s_board_render.jpg
diff --git a/doc/bumwings_v001R55_xiao_sd_board_render.jpg b/doc/bumwings_v001R55_xiao_sd_board_render.jpg
diff --git a/doc/bumwings_v001R64_rp2040zero_board_render.jpg b/doc/bumwings_v001R64_rp2040zero_board_render.jpg
diff --git a/doc/bumwings_v001R64_rp2040zero_build_daily.jpg b/doc/bumwings_v001R64_rp2040zero_build_daily.jpg
diff --git a/doc/bumwings_v001R64_xiao_sd_board_render.jpg b/doc/bumwings_v001R64_xiao_sd_board_render.jpg
diff --git a/doc/bumwings_v001R64_xiao_sd_build_keycaps.jpg b/doc/bumwings_v001R64_xiao_sd_build_keycaps.jpg
diff --git a/doc/bumwings_v001R64_xiao_sd_build_wip.jpg b/doc/bumwings_v001R64_xiao_sd_build_wip.jpg
diff --git a/doc/bumwings_v001_xiao_s_board_render.jpg b/doc/bumwings_v001_xiao_s_board_render.jpg
diff --git a/v001/README.md b/v001/README.md
@@ -4,13 +4,39 @@ I used JLCPCB to build the first prototype PCBs for this version.  It works nice
 
 See "info.md" for more information about the background and inspiration for this keyboard design.
 
+
+## List of Variants
+
+*   "pcb_core52840" - 54-key hot-swap PCB based on the Waveshare Core52840 module
+*   "pcb_rp2040zero" - 54-key hot-swap PCB based on Waveshare RP2040 "zero" controller
+*   "pcb_xiao" - 54-key hot-swap PCB based on the Seeed Xiao controller
+*   "pcb_xiao_s" - simplified 54-key direct-soldered PCB based on the Seeed Xiao controller
+
+
+
+## Pictures
+
+The board renders for the Waveshare RP2040-zero variant are shown below:
+
+![](doc/bumwings_v001_board_render.jpg)
+
+The board renders for the Xiao Seeed variant are shown below:
+
+![](doc/bumwings_v001_xiao_board_render.jpg)
+
+The board renders for the slightly simplified Xiao Seeed variant are shown below:
+
+![](doc/bumwings_v001_xiao_s_board_render.jpg)
+
+
+
 ## Bill of Materials
 
 ## All variants
 
-Diodes:  D_SOD-123 (you will need 54 of them)
+Diodes:  54x D_SOD-123
 
-Sockets:  Kailh Choc hot-swap (again, you will need 54 of them)
+Sockets:  54x Kailh Choc hot-swap (for all variants except "pcb_xiao_s") (again, you will need 54 of them)
 
 Key caps:  MBK (either plain, or with legends, at your discretion)
 
@@ -26,11 +52,22 @@ MCU:     Waveshare RP2040 "zero" (23-pin module with USB-C port) - you can find
 
 MCU:     Xiao Seeed controller of your choice - you can find these from many suppliers
 
-Shift Register:  74HC595PW or SN74HC595PW (in TSSOP-16 format) - you can find these from many suppliers, usually around USD $1.50 for a pack of 10
+Shift Register:  2x 74HC595PW or SN74HC595PW (in TSSOP-16 format) - you can find these from many suppliers, usually around USD $1.50 for a pack of 10
 
 Reset switch and power switch:  optional, stay tuned...
 
 
+### Xiao Seeed Simplified variant
+
+MCU:    Xiao Seeed controller (as above)
+
+Shift Register:  2x 74HC595PW or SN74HC595PW (in TSSOP-16 format)
+
+No reset or power switch.  This variant is intended for non-wireless (and non-battery-powered) builds.  The Xiao Seeed RP2040 controller works very well for this variant, and I expect that the SAMD21 controller would also work very well.
+
+For this variant, all components are direct-soldered to the front of the PCB (except the key switches, obviously).
+
+
 ### Waveshare Core52840 variant
 
 MCU:     Waveshare Core52840 module, featuring Nordic Semiconductor's nRF52840
@@ -71,7 +108,7 @@ https://github.com/yumagulovrn/dao-choc-ble
 | U3           | Voltage Regulator IC      | SOT-23-5 | XC6220          | 1    |
 | U4           | Battery Charging IC       | SOT-23-5 | MCP73831        | 1    |
 
-In the Dao-Choc-BLE design, the designer offered an alternate value of 820k for "R5"; however, for such a voltage sensing circuit (for battery status) will give somewhat invalid values.  In my design, I opted to use two resistors that added up to 806k, which is the recommended value.
+In the Dao-Choc-BLE design, the designer offered an alternate value of 820k for "R5"; however, for such a voltage sensing circuit (for battery status) a resistor of 820k will give somewhat invalid values.  In my design, I opted to use two resistors that added up to 806k, which is the recommended value.
 
 **RPROG**** Value depends on your battery capacity. For 300mAh battery should be 3.3K
 

diff --git a/v001/pcb_xiao_s/BumWings_Library.pretty/Diode_D_SOD-123.kicad_mod b/v001/pcb_xiao_s/BumWings_Library.pretty/Diode_D_SOD-123.kicad_mod
@@ -0,0 +1,46 @@
+(footprint "Diode_D_SOD-123" (version 20211014) (generator pcbnew)
+  (layer "F.Cu")
+  (tedit 58645DC7)
+  (descr "SOD-123")
+  (tags "SOD-123")
+  (property "Sheetfile" "BumWings_001.kicad_sch")
+  (property "Sheetname" "")
+  (attr smd)
+  (fp_text reference "D18" (at 0 -2.000001) (layer "F.SilkS")
+    (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp 6f628468-b928-424a-b462-cf27cd9d788f)
+  )
+  (fp_text value "D" (at 0 2.1) (layer "F.Fab")
+    (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp af4c760c-3728-413a-8dd4-cee622154321)
+  )
+  (fp_text user "${REFERENCE}" (at 0 -2.000001) (layer "F.Fab")
+    (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp 194fe2dd-7ab3-4950-a971-6c6e224423e6)
+  )
+  (fp_line (start -2.4 1) (end 1.7 1) (layer "F.SilkS") (width 0.12) (tstamp 753b1756-4116-4e50-a016-3f788de932e8))
+  (fp_line (start -2.4 -1) (end -2.4 1) (layer "F.SilkS") (width 0.12) (tstamp a697d8df-df85-4595-884d-8cbb094afe5a))
+  (fp_line (start -2.4 -1) (end 1.7 -1) (layer "F.SilkS") (width 0.12) (tstamp ac6fa12e-2b5e-4394-aa65-417c2f375362))
+  (fp_line (start 2.5 -1.15) (end 2.5 1.15) (layer "F.CrtYd") (width 0.05) (tstamp 3968931e-4122-498a-80fc-55a09f430993))
+  (fp_line (start 2.5 1.15) (end -2.5 1.15) (layer "F.CrtYd") (width 0.05) (tstamp 65ea53d5-69d1-4ddc-a96e-a7b958f195be))
+  (fp_line (start -2.5 -1.15) (end 2.5 -1.15) (layer "F.CrtYd") (width 0.05) (tstamp 955cc90b-d0fa-4bc3-b628-8c62355579a9))
+  (fp_line (start -2.5 -1.15) (end -2.5 1.15) (layer "F.CrtYd") (width 0.05) (tstamp d80bacf2-028b-44cd-a7d6-b24c86e8e297))
+  (fp_line (start -0.35 0) (end 0.25 -0.4) (layer "F.Fab") (width 0.1) (tstamp 196b2dbf-ed52-425f-bb81-c01b7f1cc04a))
+  (fp_line (start -0.75 0) (end -0.35 0) (layer "F.Fab") (width 0.1) (tstamp 3325b8c2-9a95-4eb5-a060-9b1c0fe2cc80))
+  (fp_line (start -1.4 0.9) (end -1.4 -0.9) (layer "F.Fab") (width 0.1) (tstamp 56d36be8-73ab-419f-8006-99448351d452))
+  (fp_line (start 1.4 -0.9) (end 1.4 0.9) (layer "F.Fab") (width 0.1) (tstamp 5f226f96-97cd-4adb-ac57-12924baef0f8))
+  (fp_line (start -0.35 0) (end -0.35 -0.55) (layer "F.Fab") (width 0.1) (tstamp 7c6f0aa6-ab57-4704-bd6e-38678a6f1789))
+  (fp_line (start -1.4 -0.9) (end 1.4 -0.9) (layer "F.Fab") (width 0.1) (tstamp 83a05eb6-ab8a-418b-afc6-abd55913698f))
+  (fp_line (start 0.25 -0.4) (end 0.25 0.4) (layer "F.Fab") (width 0.1) (tstamp 8a340922-22e4-4972-8063-18fdb8e3bf9e))
+  (fp_line (start 1.4 0.9) (end -1.4 0.9) (layer "F.Fab") (width 0.1) (tstamp a3f91967-d286-47dd-912e-b88e7ac4bcc0))
+  (fp_line (start -0.35 0) (end -0.35 0.55) (layer "F.Fab") (width 0.1) (tstamp ba517518-a117-4e89-8506-fa01aa6c6513))
+  (fp_line (start 0.25 0.4) (end -0.35 0) (layer "F.Fab") (width 0.1) (tstamp ed4c0e6e-97c2-469f-a305-3a6188b98518))
+  (fp_line (start 0.25 0) (end 0.75 0) (layer "F.Fab") (width 0.1) (tstamp eda66f84-cb68-4e10-9d64-da5fb5cbf3b9))
+  (pad "1" smd rect (at -1.75 0) (size 1.1 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp f8712379-100f-4241-8ba9-03ff3afdfcbe))
+  (pad "2" smd rect (at 1.75 0) (size 1.1 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 68f07cbe-a811-4c8e-8d49-b7b005bd251f))
+  (model "${KISYS3DMOD}/Diode_SMD.3dshapes/D_SOD-123.wrl"
+    (offset (xyz 0 0 0))
+    (scale (xyz 1 1 1))
+    (rotate (xyz 0 0 0))
+  )
+)
diff --git a/v001/pcb_xiao_s/BumWings_Library.pretty/Kailh_PG1350_1.5u_hotswap.kicad_mod b/v001/pcb_xiao_s/BumWings_Library.pretty/Kailh_PG1350_1.5u_hotswap.kicad_mod
@@ -0,0 +1,53 @@
+(footprint "Kailh_PG1350_1.5u_hotswap" (version 20211014) (generator pcbnew)
+  (layer "F.Cu")
+  (tedit 615378AD)
+  (attr through_hole)
+  (fp_text reference "REF**" (at 0 3) (layer "F.Fab")
+    (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp 040493d4-24f9-400a-8670-0847958167a2)
+  )
+  (fp_text value "Kailh_PG1350_1.5u_hotswap_reversible" (at 0 9.5) (layer "F.Fab") hide
+    (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp 15b85071-8c51-4db7-8608-accac15fd7fd)
+  )
+  (fp_line (start -6.3 1.375) (end -3.7 1.375) (layer "B.SilkS") (width 0.2) (tstamp 034b3385-298f-4ebc-a9a4-b042cb0ed9db))
+  (fp_line (start -6.3 6.025) (end -3.725 6.025) (layer "B.SilkS") (width 0.2) (tstamp 0b63706f-7f7d-4dfa-ad65-5cf1a31ecf24))
+  (fp_line (start 2.2 7.3) (end 1.275 8.225) (layer "B.SilkS") (width 0.2) (tstamp 1036a6d0-531c-43b4-9065-a9be1a17ac53))
+  (fp_line (start -0.7 3.575) (end 1.275 3.575) (layer "B.SilkS") (width 0.2) (tstamp 63c2ba80-7c27-4353-a161-f673cd8f2c4d))
+  (fp_line (start -1.275 8.225) (end -2.55 7.2) (layer "B.SilkS") (width 0.2) (tstamp b4aa7efb-5e30-4f89-8866-f24aee7e87a6))
+  (fp_line (start -1.275 8.225) (end 1.275 8.225) (layer "B.SilkS") (width 0.2) (tstamp d5131232-4ad3-4432-886e-753fd64495c3))
+  (fp_line (start 2.2 4.5) (end 1.275 3.575) (layer "B.SilkS") (width 0.2) (tstamp e0f6b8e6-e840-492c-bb95-7e6eeab8e254))
+  (fp_arc (start -7.297199 2.30021) (mid -6.980151 1.641928) (end -6.3 1.375) (layer "B.SilkS") (width 0.2) (tstamp 2d3c27a5-2df2-4dc3-93b7-1e4ae11cfd45))
+  (fp_arc (start -0.7 3.575) (mid -2.004886 3.163571) (end -2.837801 2.078096) (layer "B.SilkS") (width 0.2) (tstamp 79e6c6f1-7529-4985-9701-1ff2d0b96ee7))
+  (fp_arc (start -3.725 6.025) (mid -2.89415 6.36915) (end -2.55 7.2) (layer "B.SilkS") (width 0.2) (tstamp 83109ece-3a7e-425f-ae93-906189424fd5))
+  (fp_arc (start -6.3 6.025) (mid -6.980151 5.758072) (end -7.297199 5.09979) (layer "B.SilkS") (width 0.2) (tstamp 9f1e3b23-5915-42a0-96e1-cb99debc53e2))
+  (fp_arc (start -3.699539 1.376187) (mid -3.151923 1.583811) (end -2.837801 2.078096) (layer "B.SilkS") (width 0.2) (tstamp ca4efb03-ce01-4823-99f7-06ab39301178))
+  (fp_line (start -13.5 -8.5) (end 13.5 -8.5) (layer "Dwgs.User") (width 0.12) (tstamp 0010188e-7dce-4fa6-95bd-65d9498deddd))
+  (fp_line (start -13.5 8.5) (end 13.5 8.5) (layer "Dwgs.User") (width 0.12) (tstamp 16b4637c-4de3-49f8-833f-778f4c9b4d4e))
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+  (fp_line (start 2.5 -3.2) (end 2.5 -6.2) (layer "Cmts.User") (width 0.12) (tstamp bc8eeeb7-850c-4eaa-8124-c2f72db0baeb))
+  (fp_line (start -2.5 -3.2) (end -2.5 -6.2) (layer "Cmts.User") (width 0.12) (tstamp ca5a875f-a776-4d0f-87bd-948c885e783e))
+  (fp_circle (center 0 -4.7) (end 0 -6.2) (layer "Cmts.User") (width 0.12) (fill none) (tstamp 41c46251-12aa-4003-bfdd-7033338dec7b))
+  (pad "" np_thru_hole circle (at -5 3.7) (size 3 3) (drill 3) (layers *.Cu *.Mask) (tstamp 0714d41c-8b93-45fa-b711-27d3fa99636a))
+  (pad "" np_thru_hole circle (at 0 0) (size 3.3 3.3) (drill 3.3) (layers F&B.Cu *.Mask) (tstamp 178c3e6b-7f17-42d7-b756-6f8b5b18f112))
+  (pad "" np_thru_hole circle (at 0 5.9) (size 3 3) (drill 3) (layers *.Cu *.Mask) (tstamp 6ca37441-3140-45e4-88c8-d5cc7f2d31b4))
+  (pad "" np_thru_hole circle (at 5.22 -4.2) (size 1.2 1.2) (drill 1.2) (layers *.Cu *.Mask) (tstamp 6da8e689-2152-44df-a485-0ae6e43949ea))
+  (pad "" np_thru_hole circle (at -5.5 0) (size 1.9 1.9) (drill 1.9) (layers *.Cu *.Mask) (tstamp a8a34413-d201-464f-8d21-bf0e44f42661))
+  (pad "" np_thru_hole circle (at 5.5 0) (size 1.9 1.9) (drill 1.9) (layers *.Cu *.Mask) (tstamp d52c7c8b-78e0-4618-9c76-96cb9dec1e72))
+  (pad "1" smd trapezoid (at -9.2 3.7 180) (size 0.6 1.4) (rect_delta 0.8 0) (layers "B.Cu" "B.Paste" "B.Mask") (tstamp cb8fc0bf-b8de-433b-be95-a5268b5c48fe))
+  (pad "1" smd rect (at -7.9 3.7 180) (size 2 2.2) (layers "B.Cu" "B.Paste" "B.Mask") (tstamp cc98a173-e7c4-4421-807c-c0e9bcc2d8f2))
+  (pad "2" smd trapezoid (at 4.2 5.9) (size 0.6 1.4) (rect_delta 0.8 0) (layers "B.Cu" "B.Paste" "B.Mask") (tstamp 3c7468e0-477f-40be-a43c-bb484d3c5fa8))
+  (pad "2" smd rect (at 2.9 5.9 180) (size 2 2.2) (layers "B.Cu" "B.Paste" "B.Mask") (tstamp 6d19cca7-25de-454d-86ab-b431936b0639))
+  (model "${KIPRJMOD}/../../lib/dao-choc-ble.3dshapes/PG1350.STEP"
+    (offset (xyz 5 -3.7 -1.825))
+    (scale (xyz 1 1 1))
+    (rotate (xyz -90 0 0))
+  )
+)
diff --git a/v001/pcb_xiao_s/BumWings_Library.pretty/Kailh_PG1350_1.5u_solder.kicad_mod b/v001/pcb_xiao_s/BumWings_Library.pretty/Kailh_PG1350_1.5u_solder.kicad_mod
@@ -0,0 +1,37 @@
+(footprint "Kailh_PG1350_1.5u_solder" (version 20211014) (generator pcbnew)
+  (layer "F.Cu")
+  (tedit 615378AD)
+  (attr through_hole)
+  (fp_text reference "REF**" (at 0 3) (layer "F.Fab")
+    (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp f89ace1a-135a-44b3-bfd4-9fc496bb68ca)
+  )
+  (fp_text value "Kailh_PG1350_hotswap_reversible" (at 0 9.5) (layer "F.Fab") hide
+    (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp 4668d237-7382-4b78-af8d-c10d9cedfc74)
+  )
+  (fp_line (start -13.5 8.5) (end 13.5 8.5) (layer "Dwgs.User") (width 0.12) (tstamp 43429711-9079-4a0b-89f5-0566b82f22c5))
+  (fp_line (start -13.5 -8.5) (end 13.5 -8.5) (layer "Dwgs.User") (width 0.12) (tstamp 68df8255-b77d-4c8a-8b3b-9a34a269de16))
+  (fp_line (start -13.5 -8.5) (end -13.5 8.5) (layer "Dwgs.User") (width 0.12) (tstamp 6e0822ca-1a8a-457d-b577-2adc0d27f3d0))
+  (fp_line (start 13.5 -8.5) (end 13.5 8.5) (layer "Dwgs.User") (width 0.12) (tstamp b7700347-fcf1-449d-aa73-df552c2295cd))
+  (fp_line (start 7.5 7.5) (end -7.5 7.5) (layer "Cmts.User") (width 0.12) (tstamp 0ad9dfa1-527a-4394-8638-0daad5855e8b))
+  (fp_line (start -2.5 -6.2) (end 2.5 -6.2) (layer "Cmts.User") (width 0.12) (tstamp 410351c0-873f-4d8e-a669-c506eccaf666))
+  (fp_line (start -7.5 -7.5) (end -7.5 7.5) (layer "Cmts.User") (width 0.12) (tstamp 43455188-46d3-482f-9620-0b7d749c98a5))
+  (fp_line (start 7.5 7.5) (end 7.5 -7.5) (layer "Cmts.User") (width 0.12) (tstamp 7bc99761-caf5-4905-ba09-2d59e44d015e))
+  (fp_line (start -7.5 -7.5) (end 7.5 -7.5) (layer "Cmts.User") (width 0.12) (tstamp 93450cf4-3cde-4d54-a5b1-76ccf7da70ea))
+  (fp_line (start 2.5 -3.2) (end 2.5 -6.2) (layer "Cmts.User") (width 0.12) (tstamp 9778fd23-09c7-4b6e-adb0-ddb986d3f331))
+  (fp_line (start -2.5 -3.2) (end -2.5 -6.2) (layer "Cmts.User") (width 0.12) (tstamp cdad5e80-c16c-4ecd-8291-dc7b964f02ba))
+  (fp_line (start -2.5 -3.2) (end 2.5 -3.2) (layer "Cmts.User") (width 0.12) (tstamp ee9f6375-9947-4769-b587-1c2f9aa55c2b))
+  (fp_circle (center 0 -4.7) (end 0 -6.2) (layer "Cmts.User") (width 0.12) (fill none) (tstamp 13cbf6c8-7621-4dcb-8dbb-f04148f3db85))
+  (pad "" np_thru_hole circle (at 5.5 0) (size 1.85 1.85) (drill 1.85) (layers F&B.Cu *.Mask) (tstamp 9236efa6-f08d-41b7-92f3-fc84838d5970))
+  (pad "" np_thru_hole circle (at -5.5 0) (size 1.85 1.85) (drill 1.85) (layers F&B.Cu *.Mask) (tstamp c5cf29a8-e1e9-4ae7-9070-c10786347d10))
+  (pad "" np_thru_hole circle (at 5.22 -4.2) (size 1.2 1.2) (drill 1.2) (layers *.Cu *.Mask) (tstamp cb5c8023-b2e0-411a-bc43-463f9c775d76))
+  (pad "" np_thru_hole circle (at 0 0) (size 3.3 3.3) (drill 3.3) (layers F&B.Cu *.Mask) (tstamp cf452f82-b3c9-487d-bf13-677be23e6b0b))
+  (pad "1" thru_hole oval (at -5.1 3.9) (size 2.4 1.8) (drill oval 1.1 0.5) (layers "F.Cu" "In1.Cu" "B.Cu" "B.Mask") (tstamp 501d325f-7c87-4e88-bccd-312c32e4c627))
+  (pad "2" thru_hole oval (at 0 5.9) (size 2.4 1.8) (drill oval 1.1 0.4) (layers "F.Cu" "In1.Cu" "B.Cu" "B.Mask") (tstamp d673aa9b-ed0f-492b-a0d4-8aa8c6065294))
+  (model "${KIPRJMOD}/../../lib/dao-choc-ble.3dshapes/PG1350.STEP"
+    (offset (xyz 5 -3.7 -1.825))
+    (scale (xyz 1 1 1))
+    (rotate (xyz -90 0 0))
+  )
+)