build(deps): bump docker/build-push-action from 3 to 4

.github/workflows/build.yml

@@ -66,13 +66,13 @@ jobs:
             # Determine the repo and leave that unset to use the normal checkout behavior
             # of using the merge commit instead of HEAD
             case $GITHUB_REPOSITORY in
-              "apache/nuttx")
+              "tiiuae/nuttx")
                 # OS
                 echo "Triggered by change in OS"
                 APPS_REF=$REF_NAME
                 ;;
 
-              "apache/nuttx-apps" )
+              "tiiuae/incubator-nuttx-apps" )
                 # APPS
                 OS_REF=$REF_NAME
                 echo "Triggered by change in APPS"
@@ -90,7 +90,7 @@ jobs:
       - name: Checkout nuttx repo
         uses: actions/checkout@v3
         with:
-          repository: apache/nuttx
+          repository: tiiuae/nuttx
           ref: ${{ steps.gittargets.outputs.os_ref }}
           path: sources/nuttx
           fetch-depth: 1
@@ -100,7 +100,7 @@ jobs:
       - name: Checkout apps repo
         uses: actions/checkout@v3
         with:
-          repository: apache/nuttx-apps
+          repository: tiiuae/incubator-nuttx-apps
           ref: ${{ steps.gittargets.outputs.apps_ref }}
           path: sources/apps
           fetch-depth: 1
@@ -122,7 +122,7 @@ jobs:
 
     strategy:
       matrix:
-        boards: [arm-01, arm-02, arm-03, arm-04, arm-05, arm-06, arm-07, arm-08, arm-09, arm-10, arm-11, arm-12, arm-13, other, risc-v, sim-01, sim-02, xtensa, codechecker]
+        boards: [arm-12, risc-v]
 
     steps:
       - name: Download Source Artifact
@@ -172,6 +172,7 @@ jobs:
         continue-on-error: true
 
   macOS:
+    if: ${{ false }}  # disable for now
     permissions:
       contents: none
     runs-on: macos-12

.github/workflows/check.yml

@@ -32,7 +32,7 @@ jobs:
       - name: Checkout nuttx repo
         uses: actions/checkout@v3
         with:
-          repository: apache/nuttx
+          repository: tiiuae/nuttx
           path: nuttx
           fetch-depth: 0
 

.github/workflows/docker_linux.yml

@@ -61,7 +61,7 @@ jobs:
         run: |
           df -h
       - name: Push Linux image
-        uses: docker/build-push-action@v3
+        uses: docker/build-push-action@v4
         with:
           context: tools/ci/docker/linux
           platforms: linux/amd64

arch/arm/src/lc823450/lc823450_i2c.c

@@ -305,7 +305,7 @@ lc823450_i2c_sem_waitdone(struct lc823450_i2c_priv_s *priv)
 
   /* Get the timeout value */
 
-  timeout = MSEC2TICK(priv->timeoms + (MSEC_PER_TICK / 2));
+  timeout = MSEC2TICK(priv->timeoms);
   timeout += SEC2TICK(CONFIG_LC823450_I2C_TIMEOSEC);
 
   /* Signal the interrupt handler that we are waiting.  NOTE:  Interrupts

arch/arm/src/stm32f7/stm32_ethernet.c

@@ -3126,7 +3126,9 @@ static inline int stm32_dm9161(struct stm32_ethmac_s *priv)
 
 static int stm32_phyinit(struct stm32_ethmac_s *priv)
 {
+#ifdef CONFIG_STM32F7_AUTONEG
   volatile uint32_t timeout;
+#endif
   uint32_t regval;
   uint16_t phyval;
   int ret;

arch/arm/src/stm32f7/stm32_i2c.c

@@ -433,6 +433,8 @@ struct stm32_i2c_config_s
 
 struct stm32_i2c_priv_s
 {
+  const struct i2c_ops_s  *ops; /* Standard I2C operations */
+
   /* Port configuration */
 
   const struct stm32_i2c_config_s *config;
@@ -470,14 +472,6 @@ struct stm32_i2c_priv_s
 #endif
 };
 
-/* I2C Device, Instance */
-
-struct stm32_i2c_inst_s
-{
-  const struct i2c_ops_s  *ops;  /* Standard I2C operations */
-  struct stm32_i2c_priv_s *priv; /* Common driver private data structure */
-};
-
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
@@ -533,6 +527,16 @@ static int stm32_i2c_pm_prepare(struct pm_callback_s *cb, int domain,
  * Private Data
  ****************************************************************************/
 
+/* Device Structures, Instantiation */
+
+static const struct i2c_ops_s stm32_i2c_ops =
+{
+  .transfer      = stm32_i2c_transfer,
+#ifdef CONFIG_I2C_RESET
+  .reset         = stm32_i2c_reset,
+#endif
+};
+
 #ifdef CONFIG_STM32F7_I2C1
 static const struct stm32_i2c_config_s stm32_i2c1_config =
 {
@@ -549,6 +553,7 @@ static const struct stm32_i2c_config_s stm32_i2c1_config =
 
 static struct stm32_i2c_priv_s stm32_i2c1_priv =
 {
+  .ops           = &stm32_i2c_ops,
   .config        = &stm32_i2c1_config,
   .refs          = 0,
   .lock          = NXMUTEX_INITIALIZER,
@@ -585,6 +590,7 @@ static const struct stm32_i2c_config_s stm32_i2c2_config =
 
 static struct stm32_i2c_priv_s stm32_i2c2_priv =
 {
+  .ops           = &stm32_i2c_ops,
   .config        = &stm32_i2c2_config,
   .refs          = 0,
   .lock          = NXMUTEX_INITIALIZER,
@@ -621,6 +627,7 @@ static const struct stm32_i2c_config_s stm32_i2c3_config =
 
 static struct stm32_i2c_priv_s stm32_i2c3_priv =
 {
+  .ops           = &stm32_i2c_ops,
   .config        = &stm32_i2c3_config,
   .refs          = 0,
   .lock          = NXMUTEX_INITIALIZER,
@@ -657,6 +664,7 @@ static const struct stm32_i2c_config_s stm32_i2c4_config =
 
 static struct stm32_i2c_priv_s stm32_i2c4_priv =
 {
+  .ops           = &stm32_i2c_ops,
   .config        = &stm32_i2c4_config,
   .refs          = 0,
   .lock          = NXMUTEX_INITIALIZER,
@@ -677,16 +685,6 @@ static struct stm32_i2c_priv_s stm32_i2c4_priv =
 };
 #endif
 
-/* Device Structures, Instantiation */
-
-static const struct i2c_ops_s stm32_i2c_ops =
-{
-  .transfer      = stm32_i2c_transfer,
-#ifdef CONFIG_I2C_RESET
-  .reset         = stm32_i2c_reset,
-#endif
-};
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -2273,8 +2271,7 @@ static int stm32_i2c_deinit(struct stm32_i2c_priv_s *priv)
 static int stm32_i2c_process(struct i2c_master_s *dev,
                              struct i2c_msg_s *msgs, int count)
 {
-  struct stm32_i2c_inst_s     *inst = (struct stm32_i2c_inst_s *)dev;
-  struct stm32_i2c_priv_s *priv = inst->priv;
+  struct stm32_i2c_priv_s *priv = (struct stm32_i2c_priv_s *)dev;
   uint32_t    status = 0;
   uint32_t    cr1;
   uint32_t    cr2;
@@ -2505,15 +2502,11 @@ static int stm32_i2c_process(struct i2c_master_s *dev,
 static int stm32_i2c_transfer(struct i2c_master_s *dev,
                               struct i2c_msg_s *msgs, int count)
 {
-  struct stm32_i2c_priv_s *priv;
+  struct stm32_i2c_priv_s *priv = (struct stm32_i2c_priv_s *)dev;
   int ret;
 
   DEBUGASSERT(dev);
 
-  /* Get I2C private structure */
-
-  priv = ((struct stm32_i2c_inst_s *)dev)->priv;
-
   /* Ensure that address or flags don't change meanwhile */
 
   ret = nxmutex_lock(&priv->lock);
@@ -2536,7 +2529,7 @@ static int stm32_i2c_transfer(struct i2c_master_s *dev,
 #ifdef CONFIG_I2C_RESET
 static int stm32_i2c_reset(struct i2c_master_s *dev)
 {
-  struct stm32_i2c_priv_s *priv;
+  struct stm32_i2c_priv_s *priv = (struct stm32_i2c_priv_s *)dev;
   unsigned int clock_count;
   unsigned int stretch_count;
   uint32_t scl_gpio;
@@ -2546,10 +2539,6 @@ static int stm32_i2c_reset(struct i2c_master_s *dev)
 
   DEBUGASSERT(dev);
 
-  /* Get I2C private structure */
-
-  priv = ((struct stm32_i2c_inst_s *)dev)->priv;
-
   /* Our caller must own a ref */
 
   DEBUGASSERT(priv->refs > 0);
@@ -2748,7 +2737,6 @@ static int stm32_i2c_pm_prepare(struct pm_callback_s *cb, int domain,
 struct i2c_master_s *stm32_i2cbus_initialize(int port)
 {
   struct stm32_i2c_priv_s *priv = NULL;  /* private data of device with multiple instances */
-  struct stm32_i2c_inst_s *inst = NULL;  /* device, single instance */
 
 #if STM32_HSI_FREQUENCY != 16000000 || defined(INVALID_CLOCK_SOURCE)
 # warning STM32_I2C_INIT: Peripheral clock is HSI and it must be 16mHz or the speed/timing calculations need to be redone.
@@ -2783,18 +2771,6 @@ struct i2c_master_s *stm32_i2cbus_initialize(int port)
         return NULL;
     }
 
-  /* Allocate instance */
-
-  if (!(inst = kmm_malloc(sizeof(struct stm32_i2c_inst_s))))
-    {
-      return NULL;
-    }
-
-  /* Initialize instance */
-
-  inst->ops  = &stm32_i2c_ops;
-  inst->priv = priv;
-
   /* Init private data for the first time, increment refs count,
    * power-up hardware and configure GPIOs.
    */
@@ -2813,7 +2789,7 @@ struct i2c_master_s *stm32_i2cbus_initialize(int port)
     }
 
   nxmutex_unlock(&priv->lock);
-  return (struct i2c_master_s *)inst;
+  return (struct i2c_master_s *)priv;
 }
 
 /****************************************************************************
@@ -2826,10 +2802,9 @@ struct i2c_master_s *stm32_i2cbus_initialize(int port)
 
 int stm32_i2cbus_uninitialize(struct i2c_master_s *dev)
 {
-  struct stm32_i2c_priv_s *priv;
+  struct stm32_i2c_priv_s *priv = (struct stm32_i2c_priv_s *)dev;
 
   DEBUGASSERT(dev);
-  priv = ((struct stm32_i2c_inst_s *)dev)->priv;
 
   /* Decrement refs and check for underflow */
 
@@ -2842,7 +2817,6 @@ int stm32_i2cbus_uninitialize(struct i2c_master_s *dev)
   if (--priv->refs)
     {
       nxmutex_unlock(&priv->lock);
-      kmm_free(dev);
       return OK;
     }
 
@@ -2857,7 +2831,6 @@ int stm32_i2cbus_uninitialize(struct i2c_master_s *dev)
   stm32_i2c_deinit(priv);
   nxmutex_unlock(&priv->lock);
 
-  kmm_free(dev);
   return OK;
 }
 

arch/risc-v/src/mpfs/Kconfig

@@ -130,7 +130,7 @@ choice
 	prompt "Choose DDR type"
 	depends on MPFS_DDR_INIT
 	default MPFS_DDR_TYPE_LPDDR4
-	
+
 config MPFS_DDR_TYPE_DDR3
 	bool "Use DDR3"
 
@@ -335,7 +335,7 @@ config MPFS_IHC_LINUX_ON_HART3
 config MPFS_IHC_LINUX_ON_HART4
 	int "Linux on hart4"
 	depends on MPFS_IHC_CLIENT || MPFS_IHC_SBI
-	default 1
+	default 0
 	range 0 1
 	---help---
 		Set this to 1 if U-boot / Linux is running on hart4
@@ -388,6 +388,43 @@ config MPFS_IHC_RPMSG_CH2
 		Use this only if using 2 x RPMSG channels.  This makes the NuttX work as the
 		RPMSG channel 2 client.
 
+config MPFS_IHC_WITH_HSS
+	bool "IHC with HSS"
+	depends on MPFS_IHC_CLIENT
+	default n
+	---help---
+		Set this to true if using IHC with HSS bootloader
+
+config MPFS_CH1_VRING_SHMEM_ADDR
+	hex "Channel 1 Vring shared memory start"
+	default 0xA2410000
+	depends on MPFS_IHC_CLIENT
+
+config MPFS_CH1_VRING0_DESC_ADDR
+	hex "Channel 1 Vring0 descriptor area"
+	default 0xA2400000
+	depends on MPFS_IHC_CLIENT
+
+config MPFS_CH1_VRING1_DESC_ADDR
+	hex "Channel 1 Vring1 descriptor area"
+	default 0xA2408000
+	depends on MPFS_IHC_CLIENT
+
+config MPFS_CH2_VRING_SHMEM_ADDR
+	hex "Channel 2 Vring shared memory start"
+	default 0xA2460000
+	depends on MPFS_IHC_CLIENT && MPFS_IHC_RPMSG_CH2
+
+config MPFS_CH2_VRING0_DESC_ADDR
+	hex "Channel 2 Vring0 descriptor area"
+	default 0xA2450000
+	depends on MPFS_IHC_CLIENT && MPFS_IHC_RPMSG_CH2
+
+config MPFS_CH2_VRING1_DESC_ADDR
+	hex "Channel 2 Vring1 descriptor area"
+	default 0xA2458000
+	depends on MPFS_IHC_CLIENT && MPFS_IHC_RPMSG_CH2
+
 config MPFS_ETHMAC
 	bool
 	default n
@@ -472,6 +509,37 @@ config MPFS_COREPWM1_NCHANNELS
 	range 1 16
 	depends on MPFS_COREPWM1
 
+comment "CAN-FD Options"
+
+config MPFS_CANFD
+	bool "CAN FD"
+	select ARCH_HAVE_CAN_ERRORS
+	select NET_CAN_HAVE_CANFD
+	select NET_CAN_EXTID
+	select NET_CAN_HAVE_TX_DEADLINE
+	default n
+
+config MPFS_CANFD_BASE
+	hex "Base address for the instance"
+	default 0x46000000
+	depends on MPFS_CANFD
+
+config MPFS_CANFD_CLK
+	int "Clock frequency of the CANFD block (Hz)"
+	default 62500000
+	range 1000000 100000000
+	depends on MPFS_CANFD
+
+config MPFS_CANFD_ARBI_BITRATE
+	int "CAN FD Arbitration phase bitrate"
+	default 1000000
+	depends on MPFS_CANFD
+
+config MPFS_CANFD_DATA_BITRATE
+	int "CAN  Arbitration phase bitrate"
+	default 4000000
+	depends on MPFS_CANFD
+
 endmenu
 
 config MPFS_DMA

arch/risc-v/src/mpfs/Make.defs

@@ -70,6 +70,10 @@ ifeq (${CONFIG_MPFS_HAVE_COREPWM},y)
 CHIP_CSRCS += mpfs_corepwm.c
 endif
 
+ifeq (${CONFIG_MPFS_CANFD}, y)
+CHIP_CSRCS += mpfs_fpga_canfd.c
+endif
+
 ifeq (${CONFIG_MPFS_DDR_INIT},y)
 CHIP_CSRCS += mpfs_ddr.c
 endif