soc/intel/alderlake: set lock offset for gpio pad communities

Initialize the pad_cfg_lock_offset field for the various gpio pad_community structures in the adl_communities. BUG=b:201430600 TEST='emerge-brya coreboot' and verify it compiles successfully. Change-Id: I2cd3e43a84b0140bb2aeae5de1e299db714d419b Signed-off-by: Nick Vaccaro <[email protected]> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58350 Tested-by: build bot (Jenkins) <[email protected]> Reviewed-by: Tim Wawrzynczak <[email protected]>
td36 · Oct 26, 2021 · 4010d4a · 4010d4a
1 parent aaec809
commit 4010d4a
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Showing 2 changed files with 8 additions and 0 deletions.
diff --git a/src/soc/intel/alderlake/gpio.c b/src/soc/intel/alderlake/gpio.c
@@ -95,6 +95,7 @@ static const struct pad_community adl_communities[] = {
 		.last_pad = GPIO_COM0_END,
 		.num_gpi_regs = NUM_GPIO_COM0_GPI_REGS,
 		.pad_cfg_base = PAD_CFG_BASE,
+		.pad_cfg_lock_offset = PAD_CFG_LOCK_OFFSET,
 		.host_own_reg_0 = HOSTSW_OWN_REG_0,
 		.gpi_int_sts_reg_0 = GPI_INT_STS_0,
 		.gpi_int_en_reg_0 = GPI_INT_EN_0,
@@ -118,6 +119,7 @@ static const struct pad_community adl_communities[] = {
 		.last_pad = GPIO_COM1_END,
 		.num_gpi_regs = NUM_GPIO_COM1_GPI_REGS,
 		.pad_cfg_base = PAD_CFG_BASE,
+		.pad_cfg_lock_offset = PAD_CFG_LOCK_OFFSET,
 		.host_own_reg_0 = HOSTSW_OWN_REG_0,
 		.gpi_int_sts_reg_0 = GPI_INT_STS_0,
 		.gpi_int_en_reg_0 = GPI_INT_EN_0,
@@ -140,6 +142,7 @@ static const struct pad_community adl_communities[] = {
 		.last_pad = GPIO_COM2_END,
 		.num_gpi_regs = NUM_GPIO_COM2_GPI_REGS,
 		.pad_cfg_base = PAD_CFG_BASE,
+		.pad_cfg_lock_offset = PAD_CFG_LOCK_OFFSET,
 		.host_own_reg_0 = HOSTSW_OWN_REG_0,
 		.gpi_int_sts_reg_0 = GPI_INT_STS_0,
 		.gpi_int_en_reg_0 = GPI_INT_EN_0,
@@ -180,6 +183,7 @@ static const struct pad_community adl_communities[] = {
 		.last_pad = GPIO_COM4_END,
 		.num_gpi_regs = NUM_GPIO_COM4_GPI_REGS,
 		.pad_cfg_base = PAD_CFG_BASE,
+		.pad_cfg_lock_offset = PAD_CFG_LOCK_OFFSET,
 		.host_own_reg_0 = HOSTSW_OWN_REG_0,
 		.gpi_int_sts_reg_0 = GPI_INT_STS_0,
 		.gpi_int_en_reg_0 = GPI_INT_EN_0,
@@ -203,6 +207,7 @@ static const struct pad_community adl_communities[] = {
 		.last_pad = GPIO_COM5_END,
 		.num_gpi_regs = NUM_GPIO_COM5_GPI_REGS,
 		.pad_cfg_base = PAD_CFG_BASE,
+		.pad_cfg_lock_offset = PAD_CFG_LOCK_OFFSET,
 		.host_own_reg_0 = HOSTSW_OWN_REG_0,
 		.gpi_int_sts_reg_0 = GPI_INT_STS_0,
 		.gpi_int_en_reg_0 = GPI_INT_EN_0,

diff --git a/src/soc/intel/alderlake/include/soc/gpio_defs.h b/src/soc/intel/alderlake/include/soc/gpio_defs.h
@@ -26,6 +26,9 @@
 		(NUM_GPIO_COM2_GPI_REGS) +\
 		(NUM_GPIO_COM4_GPI_REGS) +\
 		(NUM_GPIO_COM5_GPI_REGS))
+
+#define PAD_CFG_LOCK_OFFSET			0x80
+
 /*
  * IOxAPIC IRQs for the GPIOs
  */