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Logical assignment operator trivia
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Avoid C99 comments (//), clearer flag check, releases entry.
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svaarala committed Sep 10, 2023
1 parent 61ce5ea commit 61c33eb
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Showing 3 changed files with 7 additions and 8 deletions.
1 change: 1 addition & 0 deletions releases/releases.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -1397,3 +1397,4 @@ duktape_releases:
- "Add support for DJGPP (MSDOS) platform (GH-2472, GH-2473)"
- "Remove .caller and .arguments own properties from both strict and non-strict function objects, and add .caller and .arguments throwers to Function.prototype to match ES2015+ (GH-2482)"
- "Add support for ES2021 digit separator (GH-2537)"
- "Add support for logical assignment operators &&= and ||= (GH-2527)"
9 changes: 5 additions & 4 deletions src-input/duk_js_compiler.c
Original file line number Diff line number Diff line change
Expand Up @@ -4463,7 +4463,8 @@ DUK_LOCAL void duk__expr_led(duk_compiler_ctx *comp_ctx, duk_ivalue *left, duk_i
{
duk_regconst_t reg_temp;
duk_int_t pc_jump;
duk_small_uint_t args_truthval = args >> 8;
duk_small_uint_t args_truthval = args & 0x100;
duk_small_uint_t args_assignment = args & 0x200;
duk_small_uint_t args_rbp = args & 0xff;

duk_small_uint_t leftt;
Expand All @@ -4474,7 +4475,7 @@ DUK_LOCAL void duk__expr_led(duk_compiler_ctx *comp_ctx, duk_ivalue *left, duk_i
duk_regconst_t reg_obj;
duk_regconst_t rc_key;

if (args_truthval & 2) { // assignment
if (args_assignment) {
leftt = left->t;
if (leftt == DUK_IVAL_VAR) {
DUK_ASSERT(left->x1.t == DUK_ISPEC_VALUE); /* LHS is already side effect free */
Expand Down Expand Up @@ -4519,12 +4520,12 @@ DUK_LOCAL void duk__expr_led(duk_compiler_ctx *comp_ctx, duk_ivalue *left, duk_i
duk__ivalue_toforcedreg(comp_ctx, left, reg_temp);
DUK_ASSERT(DUK__ISREG(reg_temp));
duk__emit_bc(comp_ctx,
((args_truthval & 1) ? DUK_OP_IFTRUE_R : DUK_OP_IFFALSE_R),
(args_truthval ? DUK_OP_IFTRUE_R : DUK_OP_IFFALSE_R),
reg_temp); /* skip jump conditionally */
pc_jump = duk__emit_jump_empty(comp_ctx);
duk__expr_toforcedreg(comp_ctx, res, args_rbp /*rbp_flags*/, reg_temp /*forced_reg*/);

if (args_truthval & 2) { // assignment
if (args_assignment) {
if (leftt == DUK_IVAL_VAR) {
if (reg_varbind >= 0) {
duk__emit_a_bc(comp_ctx, DUK_OP_LDREG, reg_varbind, reg_temp);
Expand Down
5 changes: 1 addition & 4 deletions tests/ecmascript/expr/test-expr-logicalop-assignment.js
Original file line number Diff line number Diff line change
Expand Up @@ -35,8 +35,6 @@ var b = a ||= testSideEffect(0, '3') || testSideEffect(0, '4') || testSideEffect
print(a); // Should be false, not 0
print(b); // Should be false, not 0



/*===
[object Object]
false
Expand All @@ -54,7 +52,6 @@ true
testSideEffect(obj, '6').b ||= true;
print(obj.b);


/*===
tse 7
tse 8
Expand All @@ -64,4 +61,4 @@ tse 10
===*/

testSideEffect(obj, '7').b &&= testSideEffect(obj, '8').b &&= testSideEffect(obj, '9').b = testSideEffect(99, '10');
print(obj.b);
print(obj.b);

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