✨🔒 add optional on-chip debugger authentication

[stnolting]

This PR adds optional support for a authentication module for the on-chip debugger.

The authentication module is enabled by the new OCD_AUTHENTICATION top generic. A simple/exemplary authentication module is implemented in neorv32_debug_auth.vhd. Users can modify/replace this module to implement custom security mechanism.

The interface complies to the the RISC-V debug spec. Hence, the authenticator can (also) be accessed by openOCD (https://openocd.org/doc/html/Architecture-and-Core-Commands.html):

16.11.4 RISC-V Authentication Commands

The following commands can be used to authenticate to a RISC-V system. Eg. a trivial challenge-response protocol could be implemented as follows in a configuration file, immediately following init:

set challenge [riscv authdata_read]
riscv authdata_write [expr {$challenge + 1}]

Command: riscv authdata_read
Return the 32-bit value read from authdata.

Command: riscv authdata_write value
Write the 32-bit value to authdata.

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⚠️ This PR also renames the OCD-related top generics:

• ON_CHIP_DEBUGGER_EN -> OCD_EN
• DM_LEGACY_MODE -> OCD_DM_LEGACY_MODE