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Add Armv7M support for Cortex-M4 and Cortex-M7 #61
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Commits on Aug 7, 2024
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* Basic parsing functionality * A few instructions modeled for M4 * Extend helper to resolve .if/.else directives
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Cortex-M4 adjustments for Keccak
* NOT tested for functional correctness * Parsing Keccak works, "optimizing" small parts as well
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[Experimental] Refine M7 model
* Use w-form * Model shift unit * Tweak str tp/latency * Handle eor with shift as "special case"
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* ldr -> arith fwd * 2c latency if consumer has barrell shift
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Commits on Aug 13, 2024
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Commits on Oct 1, 2024
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Add 'altnerating' strategy for naive interleaving
When `split_heuristic_preprocess_naive_interleaving` is enabled, SLOTHY preprocesses the input by naively reordering instructions according to their depths in the computational flow graph. This commit introduces another naive interleaving strategy "alternate" which will make SLOTHY alternate evenly between instructions tagged with `interleaving_class=0/1`. This is useful when two sequential blocks of code are to be interleaved as evenly as possible, which is common in scalar/Neon hybrids.
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Commits on Oct 2, 2024
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Commits on Oct 7, 2024
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Add dilithium 257 NTT, iNTT, basemul (functional only)
* Includes addition to the parser that allows register ranges (e.g., for vldm)
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Draft uArch model for new instructions
* All uArch details for examples should be present * Lots of guessing involved, scepticism is advised
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Commits on Oct 10, 2024
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optimize_loop for Dilithium examples
* Introduces loop class for loops that restore the compare-to pointer using a vmov * Modifies mode of operation for loop extraction: The loop instructions need to appear in sequence
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Fix frombytes_mul_acc_32_16_kyber loop
* Slight code modification to make loop parsable
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Adapt other loop types to new arguments, account for loops that use r…
…egister arguments
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Make address offset fixup configurable
(cherry picked from commit dcb4f07)
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Commits on Oct 20, 2024
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Commits on Oct 21, 2024
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This previously mixed up the target registers, leading to functionally incorrect code.
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Bump to max number of solutions to 128
Prevent surprise-stop of long-running SLOTHY optimizations because they have bumped into the max nubmer of solutions.
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Add support for
is_spill
annotations for inputsPreviously, SLOTHY would fail when a global input was spilled via an instruction annotated with `// @slothy:is_spill`. This commit fixes this by ad-hoc creating a VirtualInstruction node for the input in this case -- as is done during ordinary DFG parsing already.
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Allow boolean SLOTHY tags within macros
Previously, a boolean tag (like `// @slothy:core=True`) inside a macro would lead to failure upon trying to unfold macro arguments. This commit fixes this.
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Revert "Re-optimize pointwise_768_dilithium"
This reverts commit 7de2bb6.
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Commits on Oct 22, 2024
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* Restrict shifted instructions more to SHIFT0 * Add 1 cycle extra latency for pk... and ubfx
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Commits on Oct 23, 2024
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* Naive implementation has 2 more vreg pushes in the beginning
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Commits on Oct 24, 2024
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Commits on Nov 6, 2024
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Commits on Nov 8, 2024
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