Merge pull request openhwgroup#2176 from silabs-mateilga/m_none_asserts

added asserts verifying m_none

cv32e40s/tb/uvmt/uvmt_cv32e40s_integration_assert.sv

@@ -21,10 +21,16 @@
 
 module uvmt_cv32e40s_integration_assert
   import uvm_pkg::*;
+  import uvma_rvfi_pkg::*;
+  import cv32e40s_pkg::*;
+  import uvmt_cv32e40s_base_test_pkg::*;
+  import isa_decoder_pkg::*;
 (
   input clk_i,
   input rst_ni,
 
+  uvma_rvfi_instr_if_t rvfi_if,
+
   input fetch_enable_i,
 
   input [31:0] boot_addr_i,
@@ -103,5 +109,26 @@ module uvmt_cv32e40s_integration_assert
     !scan_cg_en_i
   ) else `uvm_error(info_tag, "scan test should be disabled in normal operation");
 
+  //if m_ext = M_NONE, all mul and div instructions should trap
+  if (CORE_PARAM_M_EXT == cv32e40s_pkg::M_NONE) begin: gen_m_none_assert
+    a_m_none_mul_trap: assert property(
+      rvfi_if.rvfi_valid &&
+      rvfi_if.instr_asm.instr inside{CLMUL, CLMULH, CLMULR, MUL, MULH, MULHSU, MULHU, C_MUL}
+      |->
+      rvfi_if.rvfi_trap.trap
+    ) else `uvm_error(info_tag, "Multiply instruction is not illegal when M_EXT = M_NONE");
+
+    a_m_none_div_trap: assert property(
+      rvfi_if.rvfi_valid &&
+      rvfi_if.instr_asm.instr inside{DIV, DIVU, REM, REMU}
+      |->
+      rvfi_if.rvfi_trap.trap
+    ) else `uvm_error(info_tag, "Divide instruction is not illegal when M_EXT = M_NONE");
+
+
+  end: gen_m_none_assert
+
+
+
 
 endmodule : uvmt_cv32e40s_integration_assert

cv32e40s/tb/uvmt/uvmt_cv32e40s_tb.sv

@@ -776,7 +776,10 @@ module uvmt_cv32e40s_tb;
   // Core integration assertions
 
   bind cv32e40s_wrapper
-    uvmt_cv32e40s_integration_assert  integration_assert_i (.*);
+    uvmt_cv32e40s_integration_assert  integration_assert_i (
+      .rvfi_if (dut_wrap.cv32e40s_wrapper_i.rvfi_instr_if),
+      .*
+    );
 
 
   bind cv32e40s_wrapper