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Merge pull request openhwgroup#2316 from silabs-robin/obierrdebug_fix
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Random-test Fixup - `obi_err_debug`
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@silabs-robin
silabs-robin authored Dec 11, 2023
2 parents 1fed442 + 0e75616 commit 092812e
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Showing 11 changed files with 270 additions and 81 deletions.
38 changes: 20 additions & 18 deletions cv32e40s/bsp/corev_uvmt.h
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Original file line number Diff line number Diff line change
Expand Up @@ -25,25 +25,27 @@

#define CV_VP_REGISTER_BASE 0x00800000

#define CV_VP_VIRTUAL_PRINTER_OFFSET 0x00000000
#define CV_VP_RANDOM_NUM_OFFSET 0x00000040
#define CV_VP_CYCLE_COUNTER_OFFSET 0x00000080
#define CV_VP_STATUS_FLAGS_OFFSET 0x000000c0
#define CV_VP_FENCEI_TAMPER_OFFSET 0x00000100
#define CV_VP_INTR_TIMER_OFFSET 0x00000140
#define CV_VP_DEBUG_CONTROL_OFFSET 0x00000180
#define CV_VP_OBI_SLV_RESP_OFFSET 0x000001c0
#define CV_VP_SIG_WRITER_OFFSET 0x00000200
#define CV_VP_VIRTUAL_PRINTER_OFFSET 0x00000000
#define CV_VP_RANDOM_NUM_OFFSET 0x00000040
#define CV_VP_CYCLE_COUNTER_OFFSET 0x00000080
#define CV_VP_STATUS_FLAGS_OFFSET 0x000000c0
#define CV_VP_FENCEI_TAMPER_OFFSET 0x00000100
#define CV_VP_INTR_TIMER_OFFSET 0x00000140
#define CV_VP_DEBUG_CONTROL_OFFSET 0x00000180
#define CV_VP_OBI_SLV_RESP_OFFSET 0x000001c0
#define CV_VP_SIG_WRITER_OFFSET 0x00000200
#define CV_VP_OBI_ERR_AWAIT_GOAHEAD_OFFSET 0x00000240

#define CV_VP_VIRTUAL_PRINTER_BASE (CV_VP_REGISTER_BASE + CV_VP_VIRTUAL_PRINTER_OFFSET)
#define CV_VP_RANDOM_NUM_BASE (CV_VP_REGISTER_BASE + CV_VP_RANDOM_NUM_OFFSET)
#define CV_VP_CYCLE_COUNTER_BASE (CV_VP_REGISTER_BASE + CV_VP_CYCLE_COUNTER_OFFSET)
#define CV_VP_STATUS_FLAGS_BASE (CV_VP_REGISTER_BASE + CV_VP_STATUS_FLAGS_OFFSET)
#define CV_VP_INTR_TIMER_BASE (CV_VP_REGISTER_BASE + CV_VP_INTR_TIMER_OFFSET)
#define CV_VP_DEBUG_CONTROL_BASE (CV_VP_REGISTER_BASE + CV_VP_DEBUG_CONTROL_OFFSET)
#define CV_VP_OBI_SLV_RESP_BASE (CV_VP_REGISTER_BASE + CV_VP_OBI_SLV_RESP_OFFSET)
#define CV_VP_SIG_WRITER_BASE (CV_VP_REGISTER_BASE + CV_VP_SIG_WRITER_OFFSET)
#define CV_VP_FENCEI_TAMPER_BASE (CV_VP_REGISTER_BASE + CV_VP_FENCEI_TAMPER_OFFSET)
#define CV_VP_CYCLE_COUNTER_BASE (CV_VP_REGISTER_BASE + CV_VP_CYCLE_COUNTER_OFFSET)
#define CV_VP_DEBUG_CONTROL_BASE (CV_VP_REGISTER_BASE + CV_VP_DEBUG_CONTROL_OFFSET)
#define CV_VP_FENCEI_TAMPER_BASE (CV_VP_REGISTER_BASE + CV_VP_FENCEI_TAMPER_OFFSET)
#define CV_VP_INTR_TIMER_BASE (CV_VP_REGISTER_BASE + CV_VP_INTR_TIMER_OFFSET)
#define CV_VP_OBI_ERR_AWAIT_GOAHEAD_BASE (CV_VP_REGISTER_BASE + CV_VP_OBI_ERR_AWAIT_GOAHEAD_OFFSET)
#define CV_VP_OBI_SLV_RESP_BASE (CV_VP_REGISTER_BASE + CV_VP_OBI_SLV_RESP_OFFSET)
#define CV_VP_RANDOM_NUM_BASE (CV_VP_REGISTER_BASE + CV_VP_RANDOM_NUM_OFFSET)
#define CV_VP_SIG_WRITER_BASE (CV_VP_REGISTER_BASE + CV_VP_SIG_WRITER_OFFSET)
#define CV_VP_STATUS_FLAGS_BASE (CV_VP_REGISTER_BASE + CV_VP_STATUS_FLAGS_OFFSET)
#define CV_VP_VIRTUAL_PRINTER_BASE (CV_VP_REGISTER_BASE + CV_VP_VIRTUAL_PRINTER_OFFSET)

// --------------------------------------------------------------------------
// Registers inside the OBI_SLV_RESP VP
Expand Down
36 changes: 35 additions & 1 deletion cv32e40s/env/corev-dv/cv32e40s_asm_program_gen.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -19,17 +19,19 @@
//-----------------------------------------------------------------------------------------
// CV32E40S CORE-V assembly program generator - extension of the RISC-V assembly program generator.
//
// Overrides gen_program_header() and gen_test_done()
// Overrides gen_program_header() and gen_test_done() and other riscv-dv functions.
//-----------------------------------------------------------------------------------------

class cv32e40s_asm_program_gen extends corev_asm_program_gen;

`uvm_object_utils(cv32e40s_asm_program_gen)


function new (string name = "");
super.new(name);
endfunction


virtual function void gen_program_header();
string instr[];
cv32e40s_instr_gen_config corev_cfg;
Expand Down Expand Up @@ -99,6 +101,7 @@ class cv32e40s_asm_program_gen extends corev_asm_program_gen;

endfunction : gen_program_header


virtual function void trap_vector_init(int hart);
string instr[];
privileged_reg_t trap_vec_reg;
Expand Down Expand Up @@ -153,6 +156,7 @@ class cv32e40s_asm_program_gen extends corev_asm_program_gen;
gen_section(get_label("trap_vec_init", hart), instr);
endfunction : trap_vector_init


virtual function void gen_illegal_instr_handler(int hart);
string instr[$];
string load_instr = (XLEN == 32) ? "lw" : "ld";
Expand Down Expand Up @@ -195,6 +199,7 @@ class cv32e40s_asm_program_gen extends corev_asm_program_gen;
gen_section(get_label("illegal_instr_handler", hart), instr);
endfunction


virtual function void gen_instr_fault_handler(int hart);
string instr[$];
string load_instr = (XLEN == 32) ? "lw" : "ld";
Expand Down Expand Up @@ -232,6 +237,7 @@ class cv32e40s_asm_program_gen extends corev_asm_program_gen;
gen_section(get_label("instr_fault_handler", hart), instr);
endfunction


// TODO: handshake correct csr based on delegation
virtual function void gen_load_fault_handler(int hart);
string instr[$];
Expand All @@ -253,6 +259,7 @@ class cv32e40s_asm_program_gen extends corev_asm_program_gen;
gen_section(get_label("load_fault_handler", hart), instr);
endfunction


// TODO: handshake correct csr based on delegation
virtual function void gen_store_fault_handler(int hart);
string instr[$];
Expand All @@ -273,6 +280,7 @@ class cv32e40s_asm_program_gen extends corev_asm_program_gen;
gen_section(get_label("store_fault_handler", hart), instr);
endfunction


virtual function void gen_interrupt_vector_table(int hart,
string mode,
privileged_reg_t status,
Expand Down Expand Up @@ -344,6 +352,7 @@ class cv32e40s_asm_program_gen extends corev_asm_program_gen;
end
endfunction : gen_interrupt_vector_table


// Setup EPC before entering target privileged mode
virtual function void setup_epc(int hart);
string instr[$];
Expand All @@ -362,6 +371,7 @@ class cv32e40s_asm_program_gen extends corev_asm_program_gen;
gen_section(get_label("mepc_setup", hart), instr);
endfunction


// Interrupt handler routine
// Override from risc-dv:
// 1. Remove MIP read, since interrupts are auto-cleared, mip will not track through the ISS
Expand Down Expand Up @@ -516,6 +526,7 @@ class cv32e40s_asm_program_gen extends corev_asm_program_gen;

endfunction : gen_interrupt_handler_section


// Override gen_stack_section to add debugger stack generation section
// Implmeneted as a post-step to super.gen_stack_section()
virtual function void gen_stack_section(int hart);
Expand All @@ -535,6 +546,7 @@ class cv32e40s_asm_program_gen extends corev_asm_program_gen;

endfunction : gen_stack_section


// Override of init_gpr to remove cfg.dp from initiailization if a debug section is generated
virtual function void init_gpr();
string str;
Expand All @@ -560,6 +572,7 @@ class cv32e40s_asm_program_gen extends corev_asm_program_gen;
end
endfunction


// generate NMI handler.
// will be placed at a fixed address in memory, set in linker file
virtual function void gen_nmi_handler_section(int hart);
Expand Down Expand Up @@ -587,8 +600,10 @@ class cv32e40s_asm_program_gen extends corev_asm_program_gen;
nmi_handler_instr);
endfunction : gen_nmi_handler_section


virtual function void gen_section(string label, string instr[$]);
string str;

if(label == "mtvec_handler" && cfg.mtvec_mode == VECTORED) begin
str = ".section .mtvec_handler, \"ax\"";
instr_stream.push_back(str);
Expand All @@ -598,6 +613,7 @@ class cv32e40s_asm_program_gen extends corev_asm_program_gen;
str = format_string($sformatf("%0s:", label), LABEL_STR_LEN);
instr_stream.push_back(str);
end

foreach(instr[i]) begin
str = {indent, instr[i]};
instr_stream.push_back(str);
Expand All @@ -607,7 +623,25 @@ class cv32e40s_asm_program_gen extends corev_asm_program_gen;
instr_stream.push_back(str);
end
end

instr_stream.push_back("");
endfunction : gen_section


virtual function void gen_init_section(int hart);
string instrs[];
string label;

super.gen_init_section(hart);

// After the "init" section, bus errors can safely occur without havoc
label = get_label("obi_err_goahead", hart);
instrs = {
$sformatf("li x%0d, 0x%08x", cfg.gpr[0], CV_VP_OBI_ERR_AWAIT_GOAHEAD_BASE),
$sformatf("sw x0, 0(x%0d)", cfg.gpr[0])
};
gen_section(label, instrs);
endfunction


endclass : cv32e40s_asm_program_gen
100 changes: 72 additions & 28 deletions cv32e40s/env/uvme/uvme_cv32e40s_cfg.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -28,18 +28,20 @@ class uvme_cv32e40s_cfg_c extends uvma_core_cntrl_cfg_c;
// Integrals
rand int unsigned sys_clk_period;
cv32e40s_pkg::b_ext_e b_ext;
bit obi_memory_instr_random_err_enabled = 0;
bit obi_memory_instr_one_shot_err_enabled = 0;
bit obi_memory_data_random_err_enabled = 0;
bit obi_memory_data_one_shot_err_enabled = 0;
bit iss_suppress_invalid_msg = 0;
bit nmi_timeout_instr_plusarg_valid = 0;
bit irq_min_limit_plusarg_valid = 0;
bit single_step_min_limit_plusarg_valid = 0;
bit irq_single_step_threshold_plusarg_valid = 0;
bit clic_irq_clear_on_ack_plusarg_valid = 0;
bit obi_memory_data_one_shot_err_enabled = 0;
bit obi_memory_data_random_err_await_goahead = 0;
bit obi_memory_data_random_err_enabled = 0;
bit obi_memory_instr_one_shot_err_enabled = 0;
bit obi_memory_instr_random_err_await_goahead = 0;
bit obi_memory_instr_random_err_enabled = 0;
bit iss_suppress_invalid_msg = 0;
bit nmi_timeout_instr_plusarg_valid = 0;
bit irq_min_limit_plusarg_valid = 0;
bit single_step_min_limit_plusarg_valid = 0;
bit irq_single_step_threshold_plusarg_valid = 0;
bit clic_irq_clear_on_ack_plusarg_valid = 0;
rand bit clic_irq_clear_on_ack;
rand bit buserr_scoreboarding_enabled = 1;
rand bit buserr_scoreboarding_enabled = 1;
rand int unsigned fetch_toggle_initial_delay;
rand int unsigned nmi_timeout_instr;
rand int unsigned single_step_min_limit;
Expand All @@ -60,23 +62,25 @@ class uvme_cv32e40s_cfg_c extends uvma_core_cntrl_cfg_c;
rand uvma_pma_cfg_c#(ILEN,XLEN) pma_cfg;

`uvm_object_utils_begin(uvme_cv32e40s_cfg_c)
`uvm_field_int ( enabled, UVM_DEFAULT )
`uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT )
`uvm_field_int ( cov_model_enabled, UVM_DEFAULT )
`uvm_field_int ( trn_log_enabled, UVM_DEFAULT )
`uvm_field_int ( buserr_scoreboarding_enabled, UVM_DEFAULT )
`uvm_field_int ( sys_clk_period, UVM_DEFAULT | UVM_DEC )
`uvm_field_enum (b_ext_e, b_ext, UVM_DEFAULT )
`uvm_field_int ( obi_memory_instr_random_err_enabled, UVM_DEFAULT )
`uvm_field_int ( obi_memory_instr_one_shot_err_enabled, UVM_DEFAULT )
`uvm_field_int ( obi_memory_data_random_err_enabled, UVM_DEFAULT )
`uvm_field_int ( obi_memory_data_one_shot_err_enabled, UVM_DEFAULT )
`uvm_field_int ( iss_suppress_invalid_msg, UVM_DEFAULT )
`uvm_field_int ( fetch_toggle_initial_delay, UVM_DEFAULT )
`uvm_field_int ( nmi_timeout_instr, UVM_DEFAULT | UVM_DEC )
`uvm_field_int ( single_step_min_limit, UVM_DEFAULT | UVM_DEC )
`uvm_field_int ( irq_min_limit, UVM_DEFAULT | UVM_DEC )
`uvm_field_int ( irq_single_step_threshold, UVM_DEFAULT | UVM_DEC )
`uvm_field_int ( enabled, UVM_DEFAULT )
`uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT )
`uvm_field_int ( cov_model_enabled, UVM_DEFAULT )
`uvm_field_int ( trn_log_enabled, UVM_DEFAULT )
`uvm_field_int ( buserr_scoreboarding_enabled, UVM_DEFAULT )
`uvm_field_int ( sys_clk_period, UVM_DEFAULT | UVM_DEC )
`uvm_field_enum(b_ext_e, b_ext, UVM_DEFAULT )
`uvm_field_int ( obi_memory_data_one_shot_err_enabled, UVM_DEFAULT )
`uvm_field_int ( obi_memory_data_random_err_await_goahead, UVM_DEFAULT )
`uvm_field_int ( obi_memory_data_random_err_enabled, UVM_DEFAULT )
`uvm_field_int ( obi_memory_instr_one_shot_err_enabled, UVM_DEFAULT )
`uvm_field_int ( obi_memory_instr_random_err_await_goahead,UVM_DEFAULT )
`uvm_field_int ( obi_memory_instr_random_err_enabled, UVM_DEFAULT )
`uvm_field_int ( iss_suppress_invalid_msg, UVM_DEFAULT )
`uvm_field_int ( fetch_toggle_initial_delay, UVM_DEFAULT )
`uvm_field_int ( nmi_timeout_instr, UVM_DEFAULT | UVM_DEC )
`uvm_field_int ( single_step_min_limit, UVM_DEFAULT | UVM_DEC )
`uvm_field_int ( irq_min_limit, UVM_DEFAULT | UVM_DEC )
`uvm_field_int ( irq_single_step_threshold, UVM_DEFAULT | UVM_DEC )

`uvm_field_object(isacov_cfg , UVM_DEFAULT)
`uvm_field_object(clknrst_cfg , UVM_DEFAULT)
Expand Down Expand Up @@ -333,6 +337,19 @@ class uvme_cv32e40s_cfg_c extends uvma_core_cntrl_cfg_c;
obi_memory_data_cfg.drv_slv_err_one_shot_mode == obi_memory_data_one_shot_err_enabled;
}


constraint obi_memory_data_random_err_await_goahead_cons {
if (obi_memory_data_random_err_await_goahead) {
obi_memory_data_cfg.random_err_await_goahead == 1;
}
}

constraint obi_memory_instr_random_err_await_goahead_cons {
if (obi_memory_instr_random_err_await_goahead) {
obi_memory_instr_cfg.random_err_await_goahead == 1;
}
}

/**
* Creates sub-configuration objects.
*/
Expand Down Expand Up @@ -370,19 +387,25 @@ class uvme_cv32e40s_cfg_c extends uvma_core_cntrl_cfg_c;

endclass : uvme_cv32e40s_cfg_c


function uvme_cv32e40s_cfg_c::new(string name="uvme_cv32e40s_cfg");

super.new(name);

core_name = "CV32E40S";


// Read Plusargs

if ($test$plusargs("USE_ISS")) begin
use_iss = 1;
end

if ($test$plusargs("trn_log_disabled")) begin
trn_log_enabled = 0;
trn_log_enabled.rand_mode(0);
end

if ($test$plusargs("buserr_sb_disabled")) begin
buserr_scoreboarding_enabled = 0;
buserr_scoreboarding_enabled.rand_mode(0);
Expand All @@ -391,27 +414,42 @@ function uvme_cv32e40s_cfg_c::new(string name="uvme_cv32e40s_cfg");
if ($test$plusargs("obi_memory_instr_random_err")) begin
obi_memory_instr_random_err_enabled = 1;
end

if ($test$plusargs("obi_memory_instr_one_shot_err")) begin
obi_memory_instr_one_shot_err_enabled = 1;
end

if ($test$plusargs("obi_memory_data_random_err")) begin
obi_memory_data_random_err_enabled = 1;
end

if ($test$plusargs("obi_memory_data_random_err_await_goahead")) begin
obi_memory_data_random_err_await_goahead = 1;
end

if ($test$plusargs("obi_memory_instr_random_err_await_goahead")) begin
obi_memory_instr_random_err_await_goahead = 1;
end

if ($test$plusargs("obi_memory_data_one_shot_err")) begin
obi_memory_data_one_shot_err_enabled = 1;
end

if ($value$plusargs("nmi_timeout_instr=%d", nmi_timeout_instr)) begin
nmi_timeout_instr_plusarg_valid = 1;
nmi_timeout_instr.rand_mode(0);
end

if ($value$plusargs("irq_single_step_threshold=%0d", irq_single_step_threshold)) begin
irq_single_step_threshold_plusarg_valid = 1;
irq_single_step_threshold.rand_mode(0);
end

if ($value$plusargs("irq_min_limit=%0d", irq_min_limit)) begin
irq_min_limit_plusarg_valid = 1;
irq_min_limit.rand_mode(0);
end

if ($value$plusargs("single_step_min_limit=%0d", single_step_min_limit)) begin
single_step_min_limit_plusarg_valid = 1;
single_step_min_limit.rand_mode(0);
Expand All @@ -428,6 +466,8 @@ function uvme_cv32e40s_cfg_c::new(string name="uvme_cv32e40s_cfg");
end


// Create Configs

isacov_cfg = uvma_isacov_cfg_c::type_id::create("isacov_cfg");
clknrst_cfg = uvma_clknrst_cfg_c::type_id::create("clknrst_cfg");
interrupt_cfg = uvma_interrupt_cfg_c::type_id::create("interrupt_cfg");
Expand All @@ -441,6 +481,8 @@ function uvme_cv32e40s_cfg_c::new(string name="uvme_cv32e40s_cfg");
pma_cfg = uvma_pma_cfg_c#(ILEN,XLEN)::type_id::create("pma_cfg");


// Assign loggers and configs

obi_memory_instr_cfg.mon_logger_name = "OBII";
obi_memory_data_cfg.mon_logger_name = "OBID";

Expand All @@ -449,12 +491,14 @@ function uvme_cv32e40s_cfg_c::new(string name="uvme_cv32e40s_cfg");

endfunction : new


function void uvme_cv32e40s_cfg_c::pre_randomize();

`uvm_info("CFG", $sformatf("Pre-randomize num_mhpmcounters = %0d", num_mhpmcounters), UVM_LOW);

endfunction : pre_randomize


function void uvme_cv32e40s_cfg_c::post_randomize();

super.post_randomize();
Expand Down
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