feature/starfive regmaps #19
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Generalizes the DTS parser to not rely on the presence of the `reg-names` field to parse `reg` field in peripherals child nodes. Instead, rely on the structure as defined by the DTS specification, i.e. the address field is first indexed at `<address-cells> - 1`, and the size field is second indexed at `<address-cells> + <size-cells> - 1`. Search compatible list for `clic0`, `clint0`, and `plic0` strings, and modifies the `script_path` to point to the relevant regmap generator.
Adds instructions for flattening DTS files that include C and/or DTSI files.
Adds register definitions for the JH7110 PWM peripheral. Register offsets and fields taken from the VisionFive2 SDK linux PWM driver.
Adds logging messages to help with debugging.
Adds a script for StarFive JH7110 SYSCRG clock register definitions.
Adds a script for StarFive JH7110 STGCRG clock register definitions.
Adds a script for StarFive JH7110 TRNG hardware random number generator register definitions.
Adds a script for StarFive JH7110 AONCRG clock register definitions.
Adds a script for StarFive JH7110 SYS SYSCON register definitions.
Adds a script for StarFive JH7110 STG SYSCON register definitions.
Adds a script for StarFive JH7110 AON SYSCON register definitions.
Adds a script for StarFive JH7110 SYS IOMUX CFG register definitions.
Adds a script for StarFive JH7110 AON IOMUX CFG register definitions.
Adds a script for StarFive JH7110 PMU register definitions.
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Adds a script for Synopsys Designware I2C register definitions. Based on Linux driver at [`linux/drivers/i2c/busses/i2c-designware-core.h`](https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/i2c/busses/i2c-designware-core.h)
Adds a script for ARM PL022 SPI register definitions. Register definitions from the SSP PL022 R1P3 TRM: <https://developer.arm.com/documentation/ddi0194/g/DDI0194G_ssp_pl022_r1p3_trm.pdf>
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Adds a default `resetValue` field to registers defined with `starfive_common/generate_register`. Allows SVD parsers to supply a default reset value for the register. Defaults to zero, which should be a safe reset value for most registers. Users that require a non-zero default can supply it as an argument to `generate_register`.
Simplifies peripheral naming to remove specific manufacturer information from the top-level peripheral name. This results in better output in the SVD file, which allows for more uniform generated code.
Improves and simplifies SYS GPIO register names by clarifying peripheral names according to functionality, instead of the provided StarFive naming conventions. Register fields still follow StarFive naming conventions to make following TRM documentation easier. Fixes some errors in register definitions that were overlooked in the original implementation. Specifically, the `FMUX` registers are split into `GPO_DOEN`, `GPO_DOUT`, and `GPI` registers. Adds default values to all register definitions.
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Adds register definitions for Cadence QSPI-NOR controllers.
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Adds register definitions for Synopsys Designware APB UART peripherals. Register definitions from DW_apb_uart Databook: <https://linux-sunxi.org/images/d/d2/Dw_apb_uart_db.pdf>
Uses the `generate_register` helper function to generate StarFive JH7110 `stg_syscon` peripheral registers. Renames registers to be compatible with `svd2rust` array naming.
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Adds a `resetValue` entry for PLIC peripheral registers. This allows users to enable code generation that requires the reset value of the registers.
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Renames `sys_syscon` registers for better compatibility with array indexing. Makes some names less verbose, and adds register field descriptions. Changes `reset_vector` fields to single-bit entries making for easier access in generated code. Uses the `generate_register` helper function to define registers. Decreases repetition, and enables resettable implementation in generated code.
Renames `AON_SYSCON` registers with more concise names. Uses the `generate_register` helper function to increase code re-use, and have more uniformity in register definitions.
Uses the `generate_register` helper function to increase code re-use, and more uniformity in register definitions.
Uses the `generate_register` helper function for all common functions to increase code re-use, and enable reset functionality in generated code.
Simplify the names from the ones supplied in the JH7110 Technical Reference Manual. Uses the `generate_register` helper function to increase code re-use, and add resettable implementations in generated code.
Adds the ability to generate an `interrupt` entry for a peripheral using the `generate_interrrupt` helper function. The function defines a IRQ map for given SoC(s), and does a `name` lookup for the IRQ number. Allows defining an IRQ enum in generated code.
Simplifies register names supplied in the JH7110 Technical Reference manual. Fixes errors in a previous refactor for the register offsets.
Simplifies the naming of `sys_syscon` register fields from the ones supplied in the JH7110 Technical Reference Manual.
Further simplification of the naming for registers in the `syscrg` clock peripheral.
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Adds register fields `size` and `resetValue` to `clint` registers to enable resettable implementations in generated code.
Adds register fields to the `clint` peripheral registers based on the `U74` Core Complex Manual.
Further naming simplification for `stg_syscon` peripheral registers.
Simplifies the reset field names for the `aoncrg`, `stgcrg`, and `syscrg` peripherals.
Switches `gpo_dout` registers to index-based naming to match `gpo_doen` registers, for consistency.
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Adds function to generate register arrays using the `dim` and `dimIncrement` register attributes. Adds scripts to generate JH7110 DDR memory controller CTRL and PHY peripheral registers.
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Adds regmap SVD files and scripts for JH7110 SoCs.
Currently, the two boards supported by these changes are the VisionFive2 v1.2a and v1.3b.
With some modification, the Pine64 Star64 board could also be supported.
Register information comes from the Preliminary Technical Reference Manual v2.
Some register information was changed due to typos in the original, and/or for clarification of duplicate register names.
Depends on #18