CI: simulation and HW build with LLVM on RISCV

Signed-off-by: Axel Heider <[email protected]>
seL4 · Jan 11, 2024 · 75fc800 · 75fc800
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commit 75fc800
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diff --git a/.github/workflows/sel4test-hw.yml b/.github/workflows/sel4test-hw.yml
@@ -33,11 +33,8 @@ jobs:
     strategy:
       fail-fast: false
       matrix:
-        march: [armv7a, armv8a, nehalem]
-        compiler: [gcc, clang]
-        include:
-          - march: rv64imac
-            compiler: gcc
+        # There is no "rv32imac" hardware yet.
+        march: [armv7a, armv8a, nehalem, rv64imac]
     steps:
     - name: Build
       uses: seL4/ci-actions/sel4test-hw@master

diff --git a/.github/workflows/sel4test-sim.yml b/.github/workflows/sel4test-sim.yml
@@ -21,11 +21,6 @@ jobs:
       matrix:
         march: [armv7a, armv8a, nehalem, rv32imac, rv64imac]
         compiler: [gcc, clang]
-        exclude:
-          - march: rv32imac
-            compiler: clang
-          - march: rv64imac
-            compiler: clang
     steps:
     - uses: seL4/ci-actions/sel4test-sim@master
       with: