Improve assembly style throughout

seL4 · Sep 5, 2023 · af42145 · af42145
1 parent 005dfec
commit af42145
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Showing 2 changed files with 8 additions and 16 deletions.
diff --git a/crates/examples/root-task/example-root-task-without-runtime/src/main.rs b/crates/examples/root-task/example-root-task-without-runtime/src/main.rs
@@ -113,8 +113,7 @@ cfg_if::cfg_if! {
                     mov sp, x9
                     b __rust_entry
 
-                1:
-                    b 1b
+                1:  b 1b
             "#
         }
     } else if #[cfg(target_arch = "riscv64")] {
@@ -131,17 +130,15 @@ cfg_if::cfg_if! {
                     # See https://www.sifive.com/blog/all-aboard-part-3-linker-relaxation-in-riscv-toolchain
                 .option push
                 .option norelax
-                1:
-                    auipc gp, %pcrel_hi(__global_pointer$)
+                1:  auipc gp, %pcrel_hi(__global_pointer$)
                     addi gp, gp, %pcrel_lo(1b)
                 .option pop
 
                     la sp, __stack_top
                     ld sp, (sp)
                     jal __rust_entry
 
-                1:
-                    j 1b
+                1:  j 1b
             "#
         }
     } else if #[cfg(target_arch = "x86_64")] {
@@ -160,8 +157,7 @@ cfg_if::cfg_if! {
                     push rbp
                     call __rust_entry
 
-                1:
-                    jmp 1b
+                1:  jmp 1b
             "#
         }
     } else {

diff --git a/crates/sel4-runtime-common/src/start.rs b/crates/sel4-runtime-common/src/start.rs
@@ -50,8 +50,7 @@ cfg_if::cfg_if! {
                     mov sp, x9
                     b sel4_runtime_rust_entry
 
-                1:
-                    b 1b
+                1:  b 1b
             "#
         }
     } else if #[cfg(target_arch = "riscv64")] {
@@ -68,17 +67,15 @@ cfg_if::cfg_if! {
                     # See https://www.sifive.com/blog/all-aboard-part-3-linker-relaxation-in-riscv-toolchain
                 .option push
                 .option norelax
-                1:
-                    auipc gp, %pcrel_hi(__global_pointer$)
+                1:  auipc gp, %pcrel_hi(__global_pointer$)
                     addi gp, gp, %pcrel_lo(1b)
                 .option pop
 
                     la sp, __sel4_runtime_stack_top
                     ld sp, (sp)
                     jal sel4_runtime_rust_entry
 
-                1:
-                    j 1b
+                1:  j 1b
             "#
         }
     } else if #[cfg(target_arch = "x86_64")] {
@@ -97,8 +94,7 @@ cfg_if::cfg_if! {
                     push rbp
                     call sel4_runtime_rust_entry
 
-                1:
-                    jmp 1b
+                1:  jmp 1b
             "#
         }
     } else {