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Frontend and backend for building circuits #799

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@dreamATD dreamATD commented Dec 31, 2024

This is an implementation of the expression-based and plonkish-like GKR IOP protocol. The circuit is denoted as Chip, holding all information to process commit phases and GKR proving phase. In the current implementation, we assume there are two commit phases. To process the GKR phase, we extract a GKRCircuit from it and run the GKR protocol. For the implementation status, the GKR phase is ready for review, while the commit phases hasn't been finalized.

Define a GKR IOP protocol for a chip includes defining build_commit_phase, build_commit_phase2 and build_gkr_phase. Specially, build_gkr_phase is mainly to build GKR layers in the reverse order. In addition to specify the expressions, to simplify the case of either transferring evaluations from an input of a succeeding layer to an output of the current layer or even make some computations before feeding to the current layer, we use an evaluation tape to place the evaluations and EvalExpression to define the computation. Each layer input will be assigned a position in the evaluation tape. EvalExpression is defined as follows:

#[derive(Clone, Debug)]
pub enum EvalExpression {
    Single(usize),
    Linear(usize, Constant, Constant),
    Partition(Vec<Box<EvalExpression>>, Vec<(usize, Constant)>),
}

of which the items denote how to compute the output evaluations. For more details please refer to gkr_iop/src/evaluation.rs.

Here are some subsequent tasks:

  • Parallelize the vector evaluations under subprotocols/src/expression/.
  • Devirgo migration.
  • Benchmarks.
  • Keccak example and benchmarks.

Although the previous tasks should be done, I suggest to start the first round of review first. Would like to see comments from @naure and @hero78119 so that I can adjust the design before moving forward.

Upd: The design doc: https://hackmd.io/@sphere-liu/HyLR-h2L1g.

@dreamATD dreamATD requested review from hero78119 and naure January 1, 2025 02:37
@dreamATD dreamATD force-pushed the tianyi/refactor-prover branch from 5e1aa50 to dc664af Compare January 1, 2025 03:07
@dreamATD dreamATD force-pushed the tianyi/refactor-prover branch from dc664af to 929eddf Compare January 1, 2025 03:46
@kunxian-xia kunxian-xia self-requested a review January 2, 2025 08:50
@matthiasgoergens matthiasgoergens self-requested a review January 2, 2025 08:52
@dreamATD dreamATD linked an issue Jan 6, 2025 that may be closed by this pull request
matthiasgoergens and others added 2 commits January 6, 2025 15:39
Suggestions for #799

Feel free to pick and choose from the suggestions. I talk about most of
them on your PR.

---------

Co-authored-by: dreamATD <[email protected]>
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First pass on gkr_iop. It makes sense so far.

gkr_iop/src/chip.rs Outdated Show resolved Hide resolved
gkr_iop/src/chip/builder.rs Show resolved Hide resolved
gkr_iop/examples/multi_layer_logup.rs Show resolved Hide resolved

use super::Chip;

impl Chip {
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Suggesting the name CircuitBuilder instead of Chip.

Comment on lines 55 to 59
// TODO: the following trait consists of `commit_phase1`, `commit_phase2`, `gkr_phase` and `opening_phase`.
pub trait ProtocolProver<E: ExtensionField, Trans: Transcript<E>, PCS> {}

// TODO: the following trait consists of `commit_phase1`, `commit_phase2`, `gkr_phase` and `opening_phase`.
pub trait ProtocolVerifier<E: ExtensionField, Trans: Transcript<E>, PCS> {}
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@naure If I will implement those traits for Chip later, do you still think it's better to rename Chip to be CircuitBuilder?

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Or just add a /// comment that explains all the responsibilities of the Chip type?

@dreamATD dreamATD force-pushed the tianyi/refactor-prover branch from 16b57f3 to 29061f1 Compare January 9, 2025 11:30
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frontend design for precompiles
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