SC_23-Unity ECC

This project is licensed under the terms of the MIT license

Author

Dongwhee Kim

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Paper title: [SC'23] Unity ECC: Unified Memory Protection Against Bit and Chip Errors

Paper URL: https://dl.acm.org/doi/abs/10.1145/3581784.3607081

Overview

1_Performance_DRAMenergy

• Figure 7
• Figure 8 (Multi-core) is not uploaded! (too large size! 3GB)

• Updated after publication! Ramulator2 supports DDR5 (https://github.com/CMU-SAFARI/ramulator2)

2_Error_Scenario

• Table 4

3_DUE_SDC_probability_Against_Raw_BER

• Figure 10

4_hardware_overhead_synthesis

• Table 4

Algorithm1_H_Matrix_Construction

• Algorithm 1

Not_used_Failure_probability_in_the_field

• Not used in this paper!

Optional (H_Matrix_Unity.txt)

• A binary representation of the (10, 8) SSC-DEC (Single Symbol Correction-Double Error Correction) H-matrix, which has the characteristics of Unity ECC.
• In the paper, we conducted an experiment by expressing it as an H-matrix in the form of a symbol, but we believe that it will be more convenient for those who have difficulty using RS-code to use the H-matrix.