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add xtensa dwarf register mapping #4878

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Feb 6, 2025
Merged

add xtensa dwarf register mapping #4878

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4 changes: 4 additions & 0 deletions librz/arch/dwarf_process.c
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Original file line number Diff line number Diff line change
Expand Up @@ -480,6 +480,7 @@ static const char *map_dwarf_reg_to_riscv_reg(ut32 reg_num) {
#include <sh/sh_dwarf_regnum_table.h>
#include <tricore/tricore_dwarf_regnum_table.h>
#include <x86/x86_dwarf_regnum_table.h>
#include <xtensa/xtensa_dwarf_regnum_table.h>

/**
* \brief Returns a function that maps a DWARF register number to a register name
Expand Down Expand Up @@ -547,6 +548,9 @@ static DWARF_RegisterMapping dwarf_register_mapping_query(RZ_NONNULL char *arch,
if (RZ_STR_EQ(arch, "rx")) {
return map_dwarf_reg_to_rx_reg;
}
if (RZ_STR_EQ(arch, "xtensa")) {
return xtensa_register_name;
}
RZ_LOG_ERROR("No DWARF register mapping function defined for %s %d bits\n", arch, bits);
return map_dwarf_register_dummy;
}
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23 changes: 23 additions & 0 deletions librz/arch/isa/xtensa/xtensa_dwarf_regnum_table.h
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Original file line number Diff line number Diff line change
@@ -0,0 +1,23 @@
// SPDX-FileCopyrightText: 2025 Billow <[email protected]>
// SPDX-License-Identifier: LGPL-3.0-only

#ifndef XTENSA_DWARF_REGNUM_TABLE_H
#define XTENSA_DWARF_REGNUM_TABLE_H

static const char *
xtensa_register_name(ut32 index) {
static const char *const reg_names[] = {
"a0", "sp", "a2", "a3", "a4", "a5", "a6", "a7",
"a8", "a9", "a10", "a11", "a12", "a13", "a14", "a15",
"fp", "argp", "b0",
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
"acc"
};
if (index >= RZ_ARRAY_SIZE(reg_names)) {
return NULL;
}
return reg_names[index];
}

#endif // XTENSA_DWARF_REGNUM_TABLE_H
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