Fix typo in smmul & smar64

riscvarchive · May 17, 2021 · 8ded055 · 8ded055
1 parent bd7f477
commit 8ded055
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/gcc/config/riscv/rvp.md b/gcc/config/riscv/rvp.md
@@ -4203,7 +4203,7 @@
 	    (any_extend:DI
 	      (match_operand:SI 3 "register_operand" " r")))))]
   "TARGET_ZPSF && !TARGET_64BIT"
-  "<rvp_su>mar64\t%0, %2, %3"
+  "<su>mar64\t%0, %2, %3"
   [(set_attr "type"   "dsp64")
    (set_attr "mode"   "DI")])
 
@@ -4911,7 +4911,7 @@
 	      (sign_extend:DI (match_operand:SI 1 "register_operand" " r"))
 	      (sign_extend:DI (match_operand:SI 2 "register_operand" " r")))
 	    (const_int 32))))]
-  "TARGET_ZPN && TARGET_64BIT"
+  "TARGET_ZPN && !TARGET_64BIT"
   "smmul\t%0, %1, %2"
   [(set_attr "type" "simd")
    (set_attr "mode" "HI")])