Allow writing CBO bits in xenvcfg

This was accidentally missed from the CBO implementation.
riscv · Dec 6, 2024 · 6f6b126 · 6f6b126
1 parent 32b1c56
commit 6f6b126
Showing 1 changed file with 7 additions and 1 deletion.
diff --git a/model/riscv_sys_regs.sail b/model/riscv_sys_regs.sail
@@ -352,6 +352,9 @@ function legalize_menvcfg(o : MEnvcfg, v : bits(64)) -> MEnvcfg = {
   let v = Mk_MEnvcfg(v);
   [o with
     FIOM = if sys_enable_writable_fiom() then v[FIOM] else 0b0,
+    CBZE = v[CBZE],
+    CBCFE = v[CBCFE],
+    CBIE = if v[CBIE] != 0b10 then v[CBIE] else 0b00,
     STCE = if extensionEnabled(Ext_Sstc) then v[STCE] else 0b0,
     // Other extensions are not implemented yet so all other fields are read only zero.
   ]
@@ -361,8 +364,11 @@ function legalize_senvcfg(o : SEnvcfg, v : xlenbits) -> SEnvcfg = {
   let v = Mk_SEnvcfg(v);
   [o with
     FIOM = if sys_enable_writable_fiom() then v[FIOM] else 0b0,
+    CBZE = v[CBZE],
+    CBCFE = v[CBCFE],
+    CBIE = if v[CBIE] != 0b10 then v[CBIE] else 0b00,
     // Other extensions are not implemented yet so all other fields are read only zero.
-  ];
+  ]
 }
 
 register menvcfg : MEnvcfg