src/mte_tag: change bit position for mte control (#11)

MTE is a 64 bit only feature and thus *envcfg CSR width are 64.
Moving mte control bits at upper word location in *envcfg CSR.


Suggested-by: Samuel Holland <[email protected]>

Signed-off-by: Deepak Gupta <[email protected]>

src/mte_tag.adoc

@@ -378,9 +378,12 @@ configuration
   {bits:  2, name: 'CBIE'},
   {bits:  1, name: 'CBCFE'},
   {bits:  1, name: 'CBZE'},
+  {bits: 23, name: 'WPRI'},
+  {bits:  2, name: 'PMM'},
   {bits:  2, name: 'MTE_MODE'},
   {bits:  1, name: 'MT_ASYNC'},
-  {bits: 50, name: 'WPRI'},
+  {bits: 21, name: 'WPRI'},
+  {bits:  1, name: 'CDE'},
   {bits:  1, name: 'ADUE'},
   {bits:  1, name: 'PBMTE'},
   {bits:  1, name: 'STCE'},
@@ -407,8 +410,11 @@ When `MTE_MODE` is `0b00`, the following rules apply to HS/S-mode:
   {bits:  2, name: 'CBIE'},
   {bits:  1, name: 'CBCFE'},
   {bits:  1, name: 'CBZE'},
-  {bits:  1, name: 'MTE_MODE'},
-  {bits: 55, name: 'WPRI'},
+  {bits: 24, name: 'WPRI'},
+  {bits:  2, name: 'PMM'},
+  {bits:  2, name: 'MTE_MODE'},
+  {bits:  1, name: 'MT_ASYNC'},
+  {bits: 27, name: 'WPRI'},
 ], config:{lanes: 4, hspace:1024}}
 ....
 
@@ -432,9 +438,12 @@ When `MTE_MODE` is `0b00`, the following rules apply to VU/U-mode:
   {bits:  2, name: 'CBIE'},
   {bits:  1, name: 'CBCFE'},
   {bits:  1, name: 'CBZE'},
+  {bits: 23, name: 'WPRI'},
+  {bits:  2, name: 'PMM'},
   {bits:  2, name: 'MTE_MODE'},
   {bits:  1, name: 'MT_ASYNC'},
-  {bits: 50, name: 'WPRI'},
+  {bits: 21, name: 'WPRI'},
+  {bits:  1, name: 'CDE'},
   {bits:  1, name: 'ADUE'},
   {bits:  1, name: 'PBMTE'},
   {bits:  1, name: 'STCE'},