Merge pull request #136 from dansmathers/patch-22

attempt at a DTS entry for CLIC for issue #91

clic.adoc

@@ -2222,3 +2222,27 @@ Interrupt map with PLIC recommendation:
 The CLIC specification does not dictate how CLIC memory-mapped registers are split between M/S/U regions as well as the layout of multiple harts as this is generally a platform issue and each platform needs to define a discovery mechanism to determine the memory map locations. Some considerations for platforms to consider are selecting regions that allow for efficient PMP and virtual memory configuration.
 For example, it may desired that the bases of each S/U-mode CLIC region is VM page (4k) aligned so they can be mapped through the TLBs.
 
+== Appendix
+
+=== Prototype DTS Entry
+Modified from Example at https://elinux.org/Device_Tree_Usage
+
+/dts-v1/;
+
+/ {
+    ...
+
+    interrupt-parent = <&intc>;
+
+    ...
+
+    intc: interrupt-controller@MCLICBASE {
+        compatible = "xxx,xxx";
+        reg = <MCLICBASE 0x5000 >;
+        interrupt-controller;
+        #interrupt-cells = <NUM_INTERRUPT>;
+    };
+
+    ...
+
+};