Skip to content

Commit

Permalink
Fix table number of RAS hint
Browse files Browse the repository at this point in the history
In latest Unprivileged ISA specification, the table of RAS hint is
numbered as Table 3.

Signed-off-by: Alvin Chang <[email protected]>
  • Loading branch information
gagachang committed Apr 16, 2024
1 parent 3a20dc9 commit 99ce955
Show file tree
Hide file tree
Showing 2 changed files with 2 additions and 2 deletions.
2 changes: 1 addition & 1 deletion src/cfi_backward.adoc
Original file line number Diff line number Diff line change
Expand Up @@ -429,7 +429,7 @@ instruction-fetch units, but they require accurate detection of instructions
used for procedure calls and returns to be effective. For RISC-V, hints as to
the instructions' usage are encoded implicitly via the register numbers used.
The return-address stack (RAS) actions to pop and/or push onto the RAS are
specified in Table 2.1 of the Unprivileged specification cite:[UNPRIV].
specified in Table 3 of the Unprivileged specification cite:[UNPRIV].
Using `x1` or `x5` as the link register allows a program to benefit from the
return-address prediction stacks. Additionally, since the shadow stack
Expand Down
2 changes: 1 addition & 1 deletion src/cfi_intro.adoc
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ convention that a `JAL`/`JALR` where `rd` (i.e. the link register) is `x1` or
`x5` is a procedure call, and a `JALR` where `rs1` is the conventional
link register (i.e. `x1` or `x5`) is a return from procedure. The architecture
allows for using these hints and conventions to support return address
prediction. The hints are specified in Table 2.1 of the Unprivileged ISA
prediction. The hints are specified in Table 3 of the Unprivileged ISA
specifications cite:[UNPRIV].

The RVC standard extension for compressed instructions provides unconditional
Expand Down

0 comments on commit 99ce955

Please sign in to comment.