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AIA: Implement Smaia/Ssaia extension #1635

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66a4ab4
AIA: Add isa=..._smaia_ssaia_... option
YenHaoChen Feb 26, 2024
62e0699
AIA: refactor: Modulize interrupt selection by default_priority
YenHaoChen Feb 26, 2024
9231043
AIA: refactor: Use a new variable, selected_interrupt, for better rea…
YenHaoChen Feb 26, 2024
83128ea
AIA: Add RV32-only mieh, miph, and midelegh CSRs
YenHaoChen Mar 28, 2024
8d1e172
AIA: Enable Smcsrind/Sscsrind if supporting Smaia/Ssaia
YenHaoChen Mar 29, 2024
6c3a60e
AIA: Add read-only 0 iprio array for machine level
YenHaoChen Mar 29, 2024
d104423
AIA: Add mtopi CSR
YenHaoChen Feb 26, 2024
8c1bfd9
AIA: Add read-only 0 mvien CSR (minimal required implementation)
YenHaoChen Feb 26, 2024
dad58b3
AIA: Add mvip CSR, where mvip.SEIP, (sometimes) mvip.STIP, and mvip.S…
YenHaoChen Feb 26, 2024
af0be26
AIA: Let mvien.SSIP be writable
YenHaoChen Feb 27, 2024
3a2fd53
AIA: refactor: Let mvip.SEIP be the software-writable bit of mip.SEIP
YenHaoChen Mar 29, 2024
a466721
AIA: Let mvien.SEIP be writable
YenHaoChen Mar 29, 2024
e424405
AIA: Alias sip[n] to mvip[n] when mideleg[n]=0 and mvien[n]=1
YenHaoChen Apr 2, 2024
f387588
AIA: Let sie[n] be writable when mideleg[n]=0 and mvien[n]=1
YenHaoChen Apr 2, 2024
e7a6027
AIA: Add RV32-only sieh and siph CSRs
YenHaoChen Mar 28, 2024
56adf18
AIA: Add read-only 0 iprio array for supervisor level
YenHaoChen Mar 29, 2024
1e0f3f5
AIA: refactor: Keep nonvirtual_sip and nonvirtual_sie variables in st…
YenHaoChen Apr 2, 2024
6cf0f2b
AIA: Add stopi CSR
YenHaoChen Feb 27, 2024
243b2e1
AIA: Add RV32-only hviph, hidelegh, vsieh, and vsiph CSRs
YenHaoChen Mar 28, 2024
c4b02ad
AIA: Add read-only 0 hvien CSR (RV32-only hvienh CSR)
YenHaoChen Feb 27, 2024
5346076
AIA: Add read-only 0 hviprio1 and hviprio2 CSRs (RV32-only hviprio1h …
YenHaoChen Feb 27, 2024
c214ff4
AIA: Add inaccessible vstopei CSR
YenHaoChen Mar 29, 2024
6d8504c
AIA: Add hvictl CSR (no interrupt)
YenHaoChen Mar 28, 2024
74e42c0
AIA: Let hvictl.VTI be writable
YenHaoChen Apr 8, 2024
e3612d6
refactor: Rename virtualized_stimecmp_csr_t to virtualized_with_speci…
YenHaoChen Oct 6, 2024
5ea18ad
AIA: Raise virtual instruction exception on acessing sie or sip (sieh…
YenHaoChen Apr 8, 2024
db5dce7
AIA: Raise virtual instruction exception on writing stimecmp (stimecm…
YenHaoChen Mar 28, 2024
5460369
AIA: Add vstopi CSR
YenHaoChen Mar 6, 2024
e14574b
AIA: Implement hvictl.VTI behavior in vstopi CSR
YenHaoChen Mar 27, 2024
511d7e1
AIA: Implement hvictl.IID and hvictl.DPR behavior in vstopi CSR
YenHaoChen Mar 28, 2024
f574b32
AIA: Implement hvictl.IPRIOM and hvictl.IPRIO behavior in vstopi CSR
YenHaoChen Mar 28, 2024
62b05b6
AIA: Permit supervisor-level interrupts even while corresponding bits…
YenHaoChen Apr 2, 2024
c774289
AIA: Handle the interrupt of nonvirtual SIP in HS-mode
YenHaoChen Aug 19, 2024
ad7c922
AIA: Take interrupts at VS level through vstopi instead of vsip and vsie
YenHaoChen Mar 27, 2024
d854584
AIA: Allow interrupt of any IID from vstopi/hvictl
YenHaoChen Aug 2, 2024
f07a39b
AIA: Handle the interrupt of vstopi in VS-mode
YenHaoChen Jul 31, 2024
4fe9c8e
Smstateen: Implement *stateen0[60] controlling CSRs (v)siselect and (…
YenHaoChen Apr 11, 2024
7471db2
Smstateen: Implement *stateen0[59] controlling CSRs hvien(h), hvictl,…
YenHaoChen Apr 11, 2024
e70ef4f
Smstateen: Implement *stateen0[59] controlling CSR vstopi
YenHaoChen May 3, 2024
4dcaff0
Smstateen: Implement *stateen0[59] controlling CSR stopi
YenHaoChen Apr 11, 2024
d50bf54
Smstateen: Implement *stateen0[59] controlling RV32-only CSRs (v)siph…
YenHaoChen Apr 11, 2024
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8 changes: 8 additions & 0 deletions disasm/isa_parser.cc
Original file line number Diff line number Diff line change
Expand Up @@ -377,6 +377,14 @@ isa_parser_t::isa_parser_t(const char* str, const char *priv)
extension_table[EXT_SSDBLTRP] = true;
} else if (ext_str == "smdbltrp") {
extension_table[EXT_SMDBLTRP] = true;
} else if (ext_str == "smaia") {
extension_table[EXT_SMAIA] = true;
extension_table[EXT_SSAIA] = true;
extension_table[EXT_SMCSRIND] = true;
extension_table[EXT_SSCSRIND] = true;
} else if (ext_str == "ssaia") {
extension_table[EXT_SSAIA] = true;
extension_table[EXT_SSCSRIND] = true;
} else if (ext_str[0] == 'x') {
extension_table['X'] = true;
if (ext_str.size() == 1) {
Expand Down
149 changes: 130 additions & 19 deletions riscv/csr_init.cc
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,24 @@ void state_t::add_csr(reg_t addr, const csr_t_p& csr)
#define add_supervisor_csr(addr, csr) add_const_ext_csr('S', addr, csr)
#define add_hypervisor_csr(addr, csr) add_ext_csr('H', addr, csr)

void state_t::add_ireg_proxy(processor_t* const proc, sscsrind_reg_csr_t::sscsrind_reg_csr_t_p ireg)
{
// This assumes xlen is always max_xlen, which is true today (see
// mstatus_csr_t::unlogged_write()):
auto xlen = proc->get_isa().get_max_xlen();

const reg_t iprio0_addr = 0x30;
for (int i=0; i<16; i+=2) {
csr_t_p iprio = std::make_shared<aia_csr_t>(proc, iprio0_addr + i, 0, 0);
if (xlen == 32) {
ireg->add_ireg_proxy(iprio0_addr + i, std::make_shared<rv32_low_csr_t>(proc, iprio0_addr + i, iprio));
ireg->add_ireg_proxy(iprio0_addr + i + 1, std::make_shared<rv32_high_csr_t>(proc, iprio0_addr + i + 1, iprio));
} else {
ireg->add_ireg_proxy(iprio0_addr + i, iprio);
}
}
}

void state_t::csr_init(processor_t* const proc, reg_t max_isa)
{
// This assumes xlen is always max_xlen, which is true today (see
Expand Down Expand Up @@ -87,8 +105,17 @@ void state_t::csr_init(processor_t* const proc, reg_t max_isa)
}
}
add_const_ext_csr(EXT_SSCOFPMF, CSR_SCOUNTOVF, std::make_shared<scountovf_csr_t>(proc, CSR_SCOUNTOVF));
add_csr(CSR_MIE, mie = std::make_shared<mie_csr_t>(proc, CSR_MIE));
add_csr(CSR_MIP, mip = std::make_shared<mip_csr_t>(proc, CSR_MIP));
mie = std::make_shared<mie_csr_t>(proc, CSR_MIE);
mip = std::make_shared<mip_csr_t>(proc, CSR_MIP);
if (xlen == 32 && proc->extension_enabled_const(EXT_SMAIA)) {
add_csr(CSR_MIE, std::make_shared<rv32_low_csr_t>(proc, CSR_MIE, mie));
add_csr(CSR_MIEH, std::make_shared<rv32_high_csr_t>(proc, CSR_MIEH, mie));
add_csr(CSR_MIP, std::make_shared<rv32_low_csr_t>(proc, CSR_MIP, mip));
add_csr(CSR_MIPH, std::make_shared<rv32_high_csr_t>(proc, CSR_MIPH, mip));
} else {
add_csr(CSR_MIE, mie);
add_csr(CSR_MIP, mip);
}
auto sip_sie_accr = std::make_shared<generic_int_accessor_t>(
this,
~MIP_HS_MASK, // read_mask
Expand Down Expand Up @@ -116,21 +143,49 @@ void state_t::csr_init(processor_t* const proc, reg_t max_isa)
1 // shiftamt
);

auto nonvirtual_sip = std::make_shared<mip_proxy_csr_t>(proc, CSR_SIP, sip_sie_accr);
nonvirtual_sip = std::make_shared<sip_csr_t>(proc, CSR_SIP, sip_sie_accr);
auto vsip = std::make_shared<mip_proxy_csr_t>(proc, CSR_VSIP, vsip_vsie_accr);
add_hypervisor_csr(CSR_VSIP, vsip);
add_supervisor_csr(CSR_SIP, std::make_shared<virtualized_csr_t>(proc, nonvirtual_sip, vsip));
auto sip = std::make_shared<virtualized_with_special_permission_csr_t>(proc, nonvirtual_sip, vsip);
if (xlen == 32 && proc->extension_enabled_const(EXT_SSAIA)) {
add_hypervisor_csr(CSR_VSIP, std::make_shared<rv32_low_csr_t>(proc, CSR_VSIP, vsip));
add_hypervisor_csr(CSR_VSIPH, std::make_shared<aia_rv32_high_csr_t>(proc, CSR_VSIPH, vsip));
add_supervisor_csr(CSR_SIP, std::make_shared<rv32_low_csr_t>(proc, CSR_SIP, sip));
add_supervisor_csr(CSR_SIPH, std::make_shared<aia_rv32_high_csr_t>(proc, CSR_SIPH, sip));
} else {
add_hypervisor_csr(CSR_VSIP, vsip);
add_supervisor_csr(CSR_SIP, sip);
}
add_hypervisor_csr(CSR_HIP, std::make_shared<mip_proxy_csr_t>(proc, CSR_HIP, hip_hie_accr));
add_hypervisor_csr(CSR_HVIP, hvip = std::make_shared<hvip_csr_t>(proc, CSR_HVIP, 0));
hvip = std::make_shared<hvip_csr_t>(proc, CSR_HVIP, 0);
if (xlen == 32 && proc->extension_enabled_const(EXT_SSAIA)) {
add_hypervisor_csr(CSR_HVIP, std::make_shared<rv32_low_csr_t>(proc, CSR_HVIP, hvip));
add_hypervisor_csr(CSR_HVIPH, std::make_shared<aia_rv32_high_csr_t>(proc, CSR_HVIPH, hvip));
} else {
add_hypervisor_csr(CSR_HVIP, hvip);
}

auto nonvirtual_sie = std::make_shared<mie_proxy_csr_t>(proc, CSR_SIE, sip_sie_accr);
nonvirtual_sie = std::make_shared<sie_csr_t>(proc, CSR_SIE, sip_sie_accr);
auto vsie = std::make_shared<mie_proxy_csr_t>(proc, CSR_VSIE, vsip_vsie_accr);
add_hypervisor_csr(CSR_VSIE, vsie);
add_supervisor_csr(CSR_SIE, std::make_shared<virtualized_csr_t>(proc, nonvirtual_sie, vsie));
auto sie = std::make_shared<virtualized_with_special_permission_csr_t>(proc, nonvirtual_sie, vsie);
if (xlen == 32 && proc->extension_enabled_const(EXT_SSAIA)) {
add_hypervisor_csr(CSR_VSIE, std::make_shared<rv32_low_csr_t>(proc, CSR_VSIE, vsie));
add_hypervisor_csr(CSR_VSIEH, std::make_shared<aia_rv32_high_csr_t>(proc, CSR_VSIEH, vsie));
add_supervisor_csr(CSR_SIE, std::make_shared<rv32_low_csr_t>(proc, CSR_SIE, sie));
add_supervisor_csr(CSR_SIEH, std::make_shared<aia_rv32_high_csr_t>(proc, CSR_SIEH, sie));
} else {
add_hypervisor_csr(CSR_VSIE, vsie);
add_supervisor_csr(CSR_SIE, sie);
}
add_hypervisor_csr(CSR_HIE, std::make_shared<mie_proxy_csr_t>(proc, CSR_HIE, hip_hie_accr));

add_supervisor_csr(CSR_MEDELEG, medeleg = std::make_shared<medeleg_csr_t>(proc, CSR_MEDELEG));
add_supervisor_csr(CSR_MIDELEG, mideleg = std::make_shared<mideleg_csr_t>(proc, CSR_MIDELEG));
mideleg = std::make_shared<mideleg_csr_t>(proc, CSR_MIDELEG);
if (xlen == 32 && proc->extension_enabled_const(EXT_SMAIA)) {
add_supervisor_csr(CSR_MIDELEG, std::make_shared<rv32_low_csr_t>(proc, CSR_MIDELEG, mideleg));
add_supervisor_csr(CSR_MIDELEGH, std::make_shared<aia_rv32_high_csr_t>(proc, CSR_MIDELEGH, mideleg));
} else {
add_supervisor_csr(CSR_MIDELEG, mideleg);
}
const reg_t counteren_mask = (proc->extension_enabled_const(EXT_ZICNTR) ? 0x7UL : 0x0) | (proc->extension_enabled_const(EXT_ZIHPM) ? 0xfffffff8ULL : 0x0);
add_user_csr(CSR_MCOUNTEREN, mcounteren = std::make_shared<masked_csr_t>(proc, CSR_MCOUNTEREN, counteren_mask, 0));
add_csr(CSR_MCOUNTINHIBIT, mcountinhibit = std::make_shared<masked_csr_t>(proc, CSR_MCOUNTINHIBIT, counteren_mask & (~MCOUNTEREN_TIME), 0));
Expand Down Expand Up @@ -162,7 +217,13 @@ void state_t::csr_init(processor_t* const proc, reg_t max_isa)
add_hypervisor_csr(CSR_HSTATUS, hstatus = std::make_shared<hstatus_csr_t>(proc, CSR_HSTATUS));
add_hypervisor_csr(CSR_HGEIE, std::make_shared<const_csr_t>(proc, CSR_HGEIE, 0));
add_hypervisor_csr(CSR_HGEIP, std::make_shared<const_csr_t>(proc, CSR_HGEIP, 0));
add_hypervisor_csr(CSR_HIDELEG, hideleg = std::make_shared<hideleg_csr_t>(proc, CSR_HIDELEG, mideleg));
hideleg = std::make_shared<hideleg_csr_t>(proc, CSR_HIDELEG, mideleg);
if (xlen == 32 && proc->extension_enabled_const(EXT_SSAIA)) {
add_hypervisor_csr(CSR_HIDELEG, std::make_shared<rv32_low_csr_t>(proc, CSR_HIDELEG, hideleg));
add_hypervisor_csr(CSR_HIDELEGH, std::make_shared<rv32_high_csr_t>(proc, CSR_HIDELEGH, hideleg));
} else {
add_hypervisor_csr(CSR_HIDELEG, hideleg);
}
const reg_t hedeleg_mask =
(1 << CAUSE_MISALIGNED_FETCH) |
(1 << CAUSE_FETCH_ACCESS) |
Expand Down Expand Up @@ -284,7 +345,7 @@ void state_t::csr_init(processor_t* const proc, reg_t max_isa)
const reg_t sstateen0_mask = (proc->extension_enabled(EXT_ZFINX) ? SSTATEEN0_FCSR : 0) |
(proc->extension_enabled(EXT_ZCMT) ? SSTATEEN0_JVT : 0) |
SSTATEEN0_CS;
const reg_t hstateen0_mask = sstateen0_mask | HSTATEEN0_SENVCFG | HSTATEEN_SSTATEEN;
const reg_t hstateen0_mask = sstateen0_mask | HSTATEEN0_CSRIND | HSTATEEN0_SENVCFG | HSTATEEN_SSTATEEN;
const reg_t mstateen0_mask = hstateen0_mask | (proc->extension_enabled(EXT_SSQOSID) ? MSTATEEN0_PRIV114 : 0);
for (int i = 0; i < 4; i++) {
const reg_t mstateen_mask = i == 0 ? mstateen0_mask : MSTATEEN_HSTATEEN;
Expand Down Expand Up @@ -320,7 +381,7 @@ void state_t::csr_init(processor_t* const proc, reg_t max_isa)
if (proc->extension_enabled_const(EXT_SSTC)) {
stimecmp = std::make_shared<stimecmp_csr_t>(proc, CSR_STIMECMP, MIP_STIP);
vstimecmp = std::make_shared<stimecmp_csr_t>(proc, CSR_VSTIMECMP, MIP_VSTIP);
auto virtualized_stimecmp = std::make_shared<virtualized_stimecmp_csr_t>(proc, stimecmp, vstimecmp);
auto virtualized_stimecmp = std::make_shared<virtualized_with_special_permission_csr_t>(proc, stimecmp, vstimecmp);
if (xlen == 32) {
add_supervisor_csr(CSR_STIMECMP, std::make_shared<rv32_low_csr_t>(proc, CSR_STIMECMP, virtualized_stimecmp));
add_supervisor_csr(CSR_STIMECMPH, std::make_shared<rv32_high_csr_t>(proc, CSR_STIMECMPH, virtualized_stimecmp));
Expand All @@ -343,20 +404,30 @@ void state_t::csr_init(processor_t* const proc, reg_t max_isa)
csr_t_p miselect = std::make_shared<basic_csr_t>(proc, CSR_MISELECT, 0);
add_csr(CSR_MISELECT, miselect);

const reg_t mireg_csrs[] = { CSR_MIREG, CSR_MIREG2, CSR_MIREG3, CSR_MIREG4, CSR_MIREG5, CSR_MIREG6 };
sscsrind_reg_csr_t::sscsrind_reg_csr_t_p mireg;
add_csr(CSR_MIREG, mireg = std::make_shared<sscsrind_reg_csr_t>(proc, CSR_MIREG, miselect));
add_ireg_proxy(proc, mireg);
const reg_t mireg_csrs[] = { CSR_MIREG2, CSR_MIREG3, CSR_MIREG4, CSR_MIREG5, CSR_MIREG6 };
for (auto csr : mireg_csrs)
add_csr(csr, std::make_shared<sscsrind_reg_csr_t>(proc, csr, miselect));
}

if (proc->extension_enabled_const(EXT_SSCSRIND)) {
csr_t_p vsiselect = std::make_shared<basic_csr_t>(proc, CSR_VSISELECT, 0);
csr_t_p vsiselect = std::make_shared<siselect_csr_t>(proc, CSR_VSISELECT, 0);
add_hypervisor_csr(CSR_VSISELECT, vsiselect);

csr_t_p siselect = std::make_shared<basic_csr_t>(proc, CSR_SISELECT, 0);
add_supervisor_csr(CSR_SISELECT, std::make_shared<virtualized_csr_t>(proc, siselect, vsiselect));
csr_t_p siselect = std::make_shared<siselect_csr_t>(proc, CSR_SISELECT, 0);
add_supervisor_csr(CSR_SISELECT, std::make_shared<virtualized_with_special_permission_csr_t>(proc, siselect, vsiselect));

const reg_t vsireg_csrs[] = { CSR_VSIREG, CSR_VSIREG2, CSR_VSIREG3, CSR_VSIREG4, CSR_VSIREG5, CSR_VSIREG6 };
const reg_t sireg_csrs[] = { CSR_SIREG, CSR_SIREG2, CSR_SIREG3, CSR_SIREG4, CSR_SIREG5, CSR_SIREG6 };
auto vsireg = std::make_shared<sscsrind_reg_csr_t>(proc, CSR_VSIREG, vsiselect);
add_hypervisor_csr(CSR_VSIREG, vsireg);

auto sireg = std::make_shared<sscsrind_reg_csr_t>(proc, CSR_SIREG, siselect);
add_ireg_proxy(proc, sireg);
add_supervisor_csr(CSR_SIREG, std::make_shared<virtualized_indirect_csr_t>(proc, sireg, vsireg));

const reg_t vsireg_csrs[] = { CSR_VSIREG2, CSR_VSIREG3, CSR_VSIREG4, CSR_VSIREG5, CSR_VSIREG6 };
const reg_t sireg_csrs[] = { CSR_SIREG2, CSR_SIREG3, CSR_SIREG4, CSR_SIREG5, CSR_SIREG6 };
for (size_t i = 0; i < std::size(vsireg_csrs); i++) {
auto vsireg = std::make_shared<sscsrind_reg_csr_t>(proc, vsireg_csrs[i], vsiselect);
add_hypervisor_csr(vsireg_csrs[i], vsireg);
Expand All @@ -380,4 +451,44 @@ void state_t::csr_init(processor_t* const proc, reg_t max_isa)

const reg_t srmcfg_mask = SRMCFG_MCID | SRMCFG_RCID;
add_const_ext_csr(EXT_SSQOSID, CSR_SRMCFG, std::make_shared<srmcfg_csr_t>(proc, CSR_SRMCFG, srmcfg_mask, 0));

mvien = std::make_shared<masked_csr_t>(proc, CSR_MVIEN, MIP_SEIP | MIP_SSIP, 0);
mvip = std::make_shared<mvip_csr_t>(proc, CSR_MVIP, 0);
if (proc->extension_enabled_const(EXT_SMAIA)) {
add_csr(CSR_MTOPI, std::make_shared<mtopi_csr_t>(proc, CSR_MTOPI));
if (xlen == 32) {
add_supervisor_csr(CSR_MVIEN, std::make_shared<rv32_low_csr_t>(proc, CSR_MVIEN, mvien));
add_supervisor_csr(CSR_MVIENH, std::make_shared<rv32_high_csr_t>(proc, CSR_MVIENH, mvien));
add_supervisor_csr(CSR_MVIP, std::make_shared<rv32_low_csr_t>(proc, CSR_MVIP, mvip));
add_supervisor_csr(CSR_MVIPH, std::make_shared<rv32_high_csr_t>(proc, CSR_MVIPH, mvip));
} else {
add_supervisor_csr(CSR_MVIEN, mvien);
add_supervisor_csr(CSR_MVIEN, mvip);
}
}

hvictl = std::make_shared<aia_csr_t>(proc, CSR_HVICTL, HVICTL_VTI | HVICTL_IID | HVICTL_DPR | HVICTL_IPRIOM | HVICTL_IPRIO, 0);
vstopi = std::make_shared<vstopi_csr_t>(proc, CSR_VSTOPI);
if (proc->extension_enabled_const(EXT_SSAIA)) { // Included by EXT_SMAIA
csr_t_p nonvirtual_stopi = std::make_shared<nonvirtual_stopi_csr_t>(proc, CSR_STOPI);
add_supervisor_csr(CSR_STOPI, std::make_shared<virtualized_with_special_permission_csr_t>(proc, nonvirtual_stopi, vstopi));
add_supervisor_csr(CSR_STOPEI, std::make_shared<inaccessible_csr_t>(proc, CSR_STOPEI));
auto hvien = std::make_shared<aia_csr_t>(proc, CSR_HVIEN, 0, 0);
auto hviprio1 = std::make_shared<aia_csr_t>(proc, CSR_HVIPRIO1, 0, 0);
auto hviprio2 = std::make_shared<aia_csr_t>(proc, CSR_HVIPRIO2, 0, 0);
if (xlen == 32) {
add_hypervisor_csr(CSR_HVIEN, std::make_shared<rv32_low_csr_t>(proc, CSR_HVIEN, hvien));
add_hypervisor_csr(CSR_HVIENH, std::make_shared<rv32_high_csr_t>(proc, CSR_HVIENH, hvien));
add_hypervisor_csr(CSR_HVIPRIO1, std::make_shared<rv32_low_csr_t>(proc, CSR_HVIPRIO1, hviprio1));
add_hypervisor_csr(CSR_HVIPRIO1H, std::make_shared<rv32_high_csr_t>(proc, CSR_HVIPRIO1H, hviprio1));
add_hypervisor_csr(CSR_HVIPRIO2, std::make_shared<rv32_low_csr_t>(proc, CSR_HVIPRIO2, hviprio2));
add_hypervisor_csr(CSR_HVIPRIO2H, std::make_shared<rv32_high_csr_t>(proc, CSR_HVIPRIO2H, hviprio2));
} else {
add_hypervisor_csr(CSR_HVIEN, hvien);
add_hypervisor_csr(CSR_HVIPRIO1, hviprio1);
add_hypervisor_csr(CSR_HVIPRIO2, hviprio2);
}
add_hypervisor_csr(CSR_HVICTL, hvictl);
add_hypervisor_csr(CSR_VSTOPI, vstopi);
}
}
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