Merge pull request #2 from vlsunil/rimt_update

Few more updates

CHANGELOG.md

@@ -5,11 +5,5 @@ All notable changes to this project will be documented in this file.
 The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
 and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
 
-**_NOTE:_** PROJECTS BUILT USING THE TEMPLATE SHOULD UPDATE THE BELOW SECTIONS AS-NEEDED.
-
-## [Unreleased]
-
-## [4.0.0] - 2004-01-27
-- Workflow improvements
-- Makefile refactoring
-- Readme updates
+## [0.0.1]
+- Initial draft for PRS TG review

GOVERNANCE.md

@@ -1,8 +1,6 @@
 # Governance
-This project for the template specification is governed by the Documentation SIG.
+This project for the RIMT specification is governed by the Platform Runtime Services (PRS) TG.
 
-The group can be joined by RISC-V members at: https://lists.riscv.org/g/sig-documentation.
+The group can be joined by RISC-V members at: https://lists.riscv.org/g/tech-prs.
 
-Mailing list archives are available at: https://lists.riscv.org/g/sig-documentation/topics.
-
-**_NOTE:_** PROJECTS BUILT USING THE TEMPLATE SHOULD UPDATE THE ABOVE TEXT AS-NEEDED.
+Mailing list archives are available at: https://lists.riscv.org/g/tech-prs/topics.

MAINTAINERS.md

@@ -1,6 +1,4 @@
 # Maintainers
 This project is maintained by the following people:
 
-- Bill Traynor ([wmat](https://github.com/wmat))
-
-**_NOTE:_** PROJECTS BUILT USING THE TEMPLATE SHOULD UPDATE THE ABOVE TEXT AS-NEEDED.
+- Sunil V L ([vlsunil](https://github.com/vlsunil))

README.adoc

@@ -1,8 +1,6 @@
-= RISC-V Specification Template
+= RISC-V IO Mapping Table Specification
 
-This repository serves as a template for creating GitHub repositories within the RISC-V organization for the purpose of developing specifications. It aims to facilitate and standardize the process of specification development.
-
-NOTE: If you are viewing this in a specification repository, kindly update the title for this section and provide an introduction relevant to your repository.
+This repository is for hosting the RISC-V IO Mapping Table (RIMT) specification required on ACPI based systems.
 
 == License
 

src/rimt-spec.adoc

@@ -73,12 +73,6 @@ Copyright 2024 by RISC-V International.
 include::contributors.adoc[]
 
 [preface]
-== Change Log
-
-=== Version 0.0.1
-
-* Initial version
-
 == Introduction
 
 The RISC-V IO Mapping Table (RIMT)  provides information about the RISC-V IOMMU and the relationship
@@ -265,7 +259,7 @@ a|
 ==== PCIe Root Complex Device Binding Structure
 The PCIe root complex device binding structure is logical PCIe root complex which can be used to
 represent an entire physical root complex, an RCiEP/set of RCiEPs, a standalone PCIe device or the
-hierarchy below a PCIe hist bridge.
+hierarchy below a PCIe host bridge.
 
 .PCIe Root Complex Device Binding Structure
 [[rc_device_structure]]
@@ -295,12 +289,13 @@ a|
 
 * Bit [31-2]: Reserved, must be zero
 
-| PCIe Segment number     | 2             | 12            | The PCI segment number, as in MCFG and
+| Reserved                | 2             | 12            | Must be zero.
+| PCIe Segment number     | 2             | 14            | The PCI segment number, as in MCFG and
                                                             as returned by _SEG method in the
                                                             ACPI namespace.
-| ID mapping array offset | 2             | 14            | The offset from the start of this device
+| ID mapping array offset | 2             | 16            | The offset from the start of this device
                                                             to the start of the ID mapping array.
-| Number of ID mappings   | 4             | 16            | Number of elements in the ID mapping
+| Number of ID mappings   | 2             | 18            | Number of elements in the ID mapping
                                                             array.
 4+|List of ID mappings
 | ID mapping array        | 16 * N        | 20            | Array of ID mapping structures. See
@@ -321,13 +316,13 @@ range of source IDs to the corresponding device IDs that will be used at the inp
                                                                mapped by this entry to a range of
                                                                device IDs that will be used at input
                                                                to the IOMMU.
-| Destination Device ID Base | 4             | 4             | The base of the destination ID range
-                                                               as mapped by this entry.
-| Number of IDs              | 4             | 8             | Number of IDs in the range. The range
+| Number of IDs              | 4             | 4             | Number of IDs in the range. The range
                                                                must include the IDs of devices that
                                                                may be enumerated later during OS
                                                                boot (For example, SR-IOV Virtual
                                                                Functions).
+| Destination Device ID Base | 4             | 8             | The base of the destination ID range
+                                                               as mapped by this entry.
 | Destination IOMMU Offset   | 4             | 12            | The destination IOMMU with which the
                                                                these IDs are associated. This field
                                                                is the offset of the RISC-V IOMMU