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backend: Remove HOG and Integral Image support
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We don't plan ever to use HOG from libcamera. Remove support.
[2712 chip tests that exercise HOG must link libpisp v1.0.2]

No PiSP hardware supports Integral Images, nor is it planned.

Don't dump config.axi for debug; it's not strictly part of the
HW job config, and has never been configured or read.
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@njhollinghurst
njhollinghurst committed Dec 1, 2023
1 parent 0c2192b commit 72c77a5
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Showing 6 changed files with 11 additions and 110 deletions.
23 changes: 5 additions & 18 deletions src/libpisp/backend/backend.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -38,8 +38,11 @@ void BackEnd::SetGlobal(pisp_be_global_config const &global)
uint32_t changed_rgb_enables = (global.rgb_enables ^ be_config_.global.rgb_enables);

if (changed_rgb_enables & (PISP_BE_RGB_ENABLE_DOWNSCALE0 | PISP_BE_RGB_ENABLE_DOWNSCALE1 |
PISP_BE_RGB_ENABLE_RESAMPLE0 | PISP_BE_RGB_ENABLE_RESAMPLE1 | PISP_BE_RGB_ENABLE_HOG))
retile_ = true; // must retile when rescaling OR HoG blocks change
PISP_BE_RGB_ENABLE_RESAMPLE0 | PISP_BE_RGB_ENABLE_RESAMPLE1))
retile_ = true; // must retile when rescale change

if (global.rgb_enables & PISP_BE_RGB_ENABLE_HOG)
throw std::runtime_error("HOG output is not supported.");

be_config_.dirty_flags_bayer |=
(global.bayer_enables & ~be_config_.global.bayer_enables); // label anything newly enabled as dirty
Expand Down Expand Up @@ -382,28 +385,12 @@ void BackEnd::SetOutputFormat(unsigned int i, pisp_be_output_format_config const
{
PISP_ASSERT(i < variant_.BackEndNumBranches(0));
be_config_.output_format[i] = output_format;

if (output_format.image.format & PISP_IMAGE_FORMAT_INTEGRAL_IMAGE)
{
// If this is an integral image request, we must constrain the format parameters!
be_config_.output_format[i].image.format = PISP_IMAGE_FORMAT_INTEGRAL_IMAGE +
PISP_IMAGE_FORMAT_PLANARITY_PLANAR + PISP_IMAGE_FORMAT_SAMPLING_444 +
(output_format.image.format & PISP_IMAGE_FORMAT_SHIFT_MASK) +
(output_format.image.format & PISP_IMAGE_FORMAT_THREE_CHANNEL);
}
be_config_.output_format[i].pad[0] = be_config_.output_format[i].pad[1] = be_config_.output_format[i].pad[2] = 0;
be_config_.dirty_flags_rgb |= PISP_BE_RGB_ENABLE_OUTPUT(i);
// Should only need a retile if the transform has changed, othwise a finalise_tile will do.
retile_ = true;
}

void BackEnd::SetHog(pisp_be_hog_config const &hog)
{
be_config_.hog = hog;
be_config_.dirty_flags_rgb |= PISP_BE_RGB_ENABLE_HOG;
finalise_tiling_ = true;
}

void BackEnd::GetOutputFormat(unsigned int i, pisp_be_output_format_config &output_format) const
{
PISP_ASSERT(i < variant_.BackEndNumBranches(0));
Expand Down
3 changes: 0 additions & 3 deletions src/libpisp/backend/backend.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -111,7 +111,6 @@ class BackEnd
void SetDownscale(unsigned int i, pisp_be_downscale_config const &downscale,
pisp_be_downscale_extra const &downscale_extra);
void SetDownscale(unsigned int i, pisp_be_downscale_extra const &downscale_extra);
void SetHog(pisp_be_hog_config const &hog);

void InitialiseYcbcr(pisp_be_ccm_config &ycbcr, const std::string &colour_space);
void InitialiseYcbcrInverse(pisp_be_ccm_config &ycbcr_inverse, const std::string &colour_space);
Expand All @@ -123,8 +122,6 @@ class BackEnd

bool ComputeOutputImageFormat(unsigned int i, pisp_image_format_config &output_format,
pisp_image_format_config const &input_format) const;
bool ComputeHogOutputImageFormat(pisp_image_format_config &output_format,
pisp_image_format_config const &input_format) const;

void SetSmartResize(unsigned int i, SmartResize const &smart_resize);

Expand Down
10 changes: 1 addition & 9 deletions src/libpisp/backend/backend_debug.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -419,16 +419,8 @@ const std::vector<config_block> be_config {
{ "channel_mix", offsetof(pisp_be_hog_config, channel_mix), sizeof(uint8_t), PISP_ARRAY_SIZE(pisp_be_hog_config, channel_mix) },
{ "stride", offsetof(pisp_be_hog_config, stride), sizeof(uint32_t), 1 },
}
},
{
"axi", offsetof(pisp_be_config, axi),
{
{ "r_qos", offsetof(pisp_be_axi_config, r_qos), sizeof(uint8_t), 1 },
{ "r_cache_prot", offsetof(pisp_be_axi_config, r_cache_prot), sizeof(uint8_t), 1 },
{ "w_qos", offsetof(pisp_be_axi_config, w_qos), sizeof(uint8_t), 1 },
{ "w_cache_prot", offsetof(pisp_be_axi_config, w_cache_prot), sizeof(uint8_t), 1 },
}
}
/* The "axi" field here is never configured or used; the real BE_AXI register is not part of the config */
};

const config_block tiles_config {
Expand Down
78 changes: 2 additions & 76 deletions src/libpisp/backend/backend_prepare.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -30,8 +30,6 @@ constexpr unsigned int UnityScale = 1 << 12;
constexpr unsigned int ResamplePrecision = 10;
constexpr unsigned int NumPhases = 16;
constexpr unsigned int NumTaps = 6;
// HoG feature constants
constexpr unsigned int HogCellSize = 8;

void check_stride(pisp_image_format_config const &config)
{
Expand Down Expand Up @@ -487,9 +485,6 @@ void BackEnd::finaliseConfig()
{
bool enabled = be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_OUTPUT(j);

if (j == PISP_BACK_END_HOG_OUTPUT)
enabled |= be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_HOG;

if (enabled)
{
// crop is enabled when it contains non-zero width/height
Expand Down Expand Up @@ -532,7 +527,6 @@ void BackEnd::finaliseConfig()
for (unsigned int i = 0; i < variant_.BackEndNumBranches(0); i++)
output_enables |= be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_OUTPUT(i);

output_enables |= be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_HOG;
if (output_enables == 0)
throw std::runtime_error("BackEnd::finalise: PiSP not configured to do anything");
}
Expand Down Expand Up @@ -718,20 +712,6 @@ void BackEnd::updateTiles()
calculate_output_alignment(c.output_format[i].image.format, PISP_BACK_END_OUTPUT_MIN_ALIGN);
}

// If HOG output is enabled, but the corresponding regular output isn't, we'll have to for that branch to get tiled up too.
if ((c.global.rgb_enables & PISP_BE_RGB_ENABLE_OUTPUT(PISP_BACK_END_HOG_OUTPUT)) == 0 &&
(c.global.rgb_enables & PISP_BE_RGB_ENABLE_HOG))
{
uint16_t width, height;

getOutputSize(PISP_BACK_END_HOG_OUTPUT, &width, &height, be_config_.input_format);
tiling_config.output_image_size[PISP_BACK_END_HOG_OUTPUT] = tiling::Length2(width, height);
tiling_config.output_min_alignment[PISP_BACK_END_HOG_OUTPUT] =
tiling::Length2(8, 1); // I think 8 is basically right
tiling_config.output_max_alignment[PISP_BACK_END_HOG_OUTPUT] =
tiling::Length2(32, 1); // and this one probably doesn't much matter
}

tiling_config.max_tile_size.dx = config_.max_tile_width ? config_.max_tile_width
: variant_.BackEndMaxTileWidth(0);
tiling_config.max_tile_size.dy = config_.max_stripe_height ? config_.max_stripe_height : MaxStripeHeight;
Expand Down Expand Up @@ -793,9 +773,6 @@ std::vector<pisp_tile> BackEnd::retilePipeline(TilingConfig const &tiling_config
{
bool enabled = (be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_OUTPUT(j));

if (j == PISP_BACK_END_HOG_OUTPUT)
enabled |= (be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_HOG);

if (enabled && (tiles[i].output[j].output.x.length == 0 || tiles[i].output[j].output.y.length == 0))
{
// If a tile produces no output there's no point sending anything down this branch, so ensure the crop
Expand Down Expand Up @@ -959,19 +936,6 @@ void BackEnd::finaliseTiling()
PISP_LOG(debug, "Branch " << j << " output offsets " << t.output_offset_x[j] << "," << t.output_offset_y[j]
<< " address offsets " << t.output_addr_offset[j] << " and "
<< t.output_addr_offset2[j]);

if (j == PISP_BACK_END_HOG_OUTPUT)
{
if (be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_HOG)
{
// Convert image dimenstions to cell dimensions. Remember, these are cell offsets.
// Use *unflipped* offsets as HOG doesn't flip its output.
int cell_offset_x = output_offset_x_unflipped / HogCellSize;
int cell_offset_y = output_offset_y_unflipped / HogCellSize;
compute_addr_offset(be_config_.hog_format, cell_offset_x, cell_offset_y, &t.output_hog_addr_offset,
nullptr);
}
}
}
}
}
Expand Down Expand Up @@ -1018,37 +982,10 @@ bool BackEnd::ComputeOutputImageFormat(unsigned int i, pisp_image_format_config
}
}

bool BackEnd::ComputeHogOutputImageFormat(pisp_image_format_config &fmt, pisp_image_format_config const &ifmt) const
{
fmt.format = be_config_.hog.compute_signed ? PISP_IMAGE_FORMAT_HOG_SIGNED : PISP_IMAGE_FORMAT_HOG_UNSIGNED;
fmt.stride2 = 0;

if (be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_HOG)
{
uint16_t w, h;

getOutputSize(PISP_BACK_END_HOG_OUTPUT, &w, &h, ifmt);
// Configure HoG dimensions. The hardware only generates output for each complete cell.
fmt.width = w / HogCellSize;
fmt.height = h / HogCellSize;
compute_stride(fmt);
return true;
}
else
{
fmt.width = 0;
fmt.height = 0;
fmt.stride = 0;
return false;
}
}

void BackEnd::Prepare(pisp_be_tiles_config *config)
{
PISP_LOG(debug, "New frame!");

bool integral_image_output = false;

// On every start-of-frame we:
// 1. Check the input configuration appears sensible.
if ((be_config_.global.bayer_enables & PISP_BE_BAYER_ENABLE_INPUT) == 0 &&
Expand All @@ -1058,7 +995,7 @@ void BackEnd::Prepare(pisp_be_tiles_config *config)
(be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_INPUT))
throw std::runtime_error("BackEnd::preFrameUpdate: both Bayer and RGB inputs are enabled");

// 2. Also check the output configuration (including HOG) is all filled in and looks sensible. Again, addresses must be
// 2. Also check the output configuration is all filled in and looks sensible. Again, addresses must be
// left to the HAL.
for (unsigned int i = 0; i < variant_.BackEndNumBranches(0); i++)
{
Expand All @@ -1067,26 +1004,15 @@ void BackEnd::Prepare(pisp_be_tiles_config *config)

if (image_config.format & PISP_IMAGE_FORMAT_INTEGRAL_IMAGE)
{
if (!variant_.BackEndIntegralImage(0, i))
throw std::runtime_error("Integral images are not supported in the current configuration.");
integral_image_output = true;
throw std::runtime_error("Integral images are not supported.");
}
}

if (be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_HOG)
{
ComputeHogOutputImageFormat(be_config_.hog_format, be_config_.input_format);
be_config_.hog.stride = be_config_.hog_format.stride;
}

// 3. Fill in any other missing bits of config, and update the tiling if necessary.
updateSmartResize();
finaliseConfig();
updateTiles();

// Integral images are only valid for a single tile output.
PISP_ASSERT((num_tiles_x_ * num_tiles_y_ == 1) || !integral_image_output);

if (config)
{ // Allow passing of empty pointer, if only be_config_ should be filled
// 4. Write the config and tiles to the provided buffer to send to the hardware.
Expand Down
4 changes: 2 additions & 2 deletions src/libpisp/backend/tiling/pisp_tiling.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -64,7 +64,7 @@ void tile_pipeline(TilingConfig const &config, Tile *tiles, int num_tiles, Lengt
std::unique_ptr<Stage> downscale_stages[NumOutputBranches];
std::unique_ptr<Stage> resample_stages[NumOutputBranches];
std::unique_ptr<Stage> output_stages[NumOutputBranches];
std::unique_ptr<Stage> hog_stage;

for (int i = 0; i < NumOutputBranches; i++)
{
Length2 const &output_image_size = config.output_image_size[i];
Expand Down Expand Up @@ -114,4 +114,4 @@ void tile_pipeline(TilingConfig const &config, Tile *tiles, int num_tiles, Lengt
PISP_LOG(info, "Made " << grid->dx << "x" << grid->dy << " tiles");
}

} // namespace libpisp
} // namespace libpisp
3 changes: 1 addition & 2 deletions src/libpisp/backend/tiling/pisp_tiling.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -25,7 +25,6 @@ struct Tile
tiling::Region crop;
tiling::Region downscale[NumOutputBranches];
tiling::Region resample[NumOutputBranches];
tiling::Region hog;
tiling::Region output[NumOutputBranches];
};

Expand Down Expand Up @@ -66,4 +65,4 @@ inline std::ostream &operator<<(std::ostream &os, TilingConfig const &tc)

void tile_pipeline(TilingConfig const &config, Tile *tile, int num_tile, tiling::Length2 *grid);

} // namespace libpisp
} // namespace libpisp

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