@@ -30,8 +30,6 @@ constexpr unsigned int UnityScale = 1 << 12;
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constexpr unsigned int ResamplePrecision = 10 ;
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constexpr unsigned int NumPhases = 16 ;
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constexpr unsigned int NumTaps = 6 ;
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- // HoG feature constants
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- constexpr unsigned int HogCellSize = 8 ;
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void check_stride (pisp_image_format_config const &config)
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{
@@ -487,9 +485,6 @@ void BackEnd::finaliseConfig()
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{
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bool enabled = be_config_.global .rgb_enables & PISP_BE_RGB_ENABLE_OUTPUT (j);
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- if (j == PISP_BACK_END_HOG_OUTPUT)
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- enabled |= be_config_.global .rgb_enables & PISP_BE_RGB_ENABLE_HOG;
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-
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if (enabled)
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{
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// crop is enabled when it contains non-zero width/height
@@ -532,7 +527,6 @@ void BackEnd::finaliseConfig()
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for (unsigned int i = 0 ; i < variant_.BackEndNumBranches (0 ); i++)
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output_enables |= be_config_.global .rgb_enables & PISP_BE_RGB_ENABLE_OUTPUT (i);
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- output_enables |= be_config_.global .rgb_enables & PISP_BE_RGB_ENABLE_HOG;
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if (output_enables == 0 )
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throw std::runtime_error (" BackEnd::finalise: PiSP not configured to do anything" );
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}
@@ -718,20 +712,6 @@ void BackEnd::updateTiles()
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calculate_output_alignment (c.output_format [i].image .format , PISP_BACK_END_OUTPUT_MIN_ALIGN);
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}
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- // If HOG output is enabled, but the corresponding regular output isn't, we'll have to for that branch to get tiled up too.
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- if ((c.global .rgb_enables & PISP_BE_RGB_ENABLE_OUTPUT (PISP_BACK_END_HOG_OUTPUT)) == 0 &&
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- (c.global .rgb_enables & PISP_BE_RGB_ENABLE_HOG))
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- {
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- uint16_t width, height;
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-
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- getOutputSize (PISP_BACK_END_HOG_OUTPUT, &width, &height, be_config_.input_format );
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- tiling_config.output_image_size [PISP_BACK_END_HOG_OUTPUT] = tiling::Length2 (width, height);
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- tiling_config.output_min_alignment [PISP_BACK_END_HOG_OUTPUT] =
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- tiling::Length2 (8 , 1 ); // I think 8 is basically right
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- tiling_config.output_max_alignment [PISP_BACK_END_HOG_OUTPUT] =
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- tiling::Length2 (32 , 1 ); // and this one probably doesn't much matter
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- }
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-
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tiling_config.max_tile_size .dx = config_.max_tile_width ? config_.max_tile_width
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: variant_.BackEndMaxTileWidth (0 );
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tiling_config.max_tile_size .dy = config_.max_stripe_height ? config_.max_stripe_height : MaxStripeHeight;
@@ -793,9 +773,6 @@ std::vector<pisp_tile> BackEnd::retilePipeline(TilingConfig const &tiling_config
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{
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bool enabled = (be_config_.global .rgb_enables & PISP_BE_RGB_ENABLE_OUTPUT (j));
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- if (j == PISP_BACK_END_HOG_OUTPUT)
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- enabled |= (be_config_.global .rgb_enables & PISP_BE_RGB_ENABLE_HOG);
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-
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if (enabled && (tiles[i].output [j].output .x .length == 0 || tiles[i].output [j].output .y .length == 0 ))
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{
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// If a tile produces no output there's no point sending anything down this branch, so ensure the crop
@@ -959,19 +936,6 @@ void BackEnd::finaliseTiling()
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PISP_LOG (debug, " Branch " << j << " output offsets " << t.output_offset_x [j] << " ," << t.output_offset_y [j]
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<< " address offsets " << t.output_addr_offset [j] << " and "
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<< t.output_addr_offset2 [j]);
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-
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- if (j == PISP_BACK_END_HOG_OUTPUT)
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- {
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- if (be_config_.global .rgb_enables & PISP_BE_RGB_ENABLE_HOG)
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- {
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- // Convert image dimenstions to cell dimensions. Remember, these are cell offsets.
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- // Use *unflipped* offsets as HOG doesn't flip its output.
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- int cell_offset_x = output_offset_x_unflipped / HogCellSize;
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- int cell_offset_y = output_offset_y_unflipped / HogCellSize;
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- compute_addr_offset (be_config_.hog_format , cell_offset_x, cell_offset_y, &t.output_hog_addr_offset ,
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- nullptr );
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- }
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- }
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}
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}
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}
@@ -1018,37 +982,10 @@ bool BackEnd::ComputeOutputImageFormat(unsigned int i, pisp_image_format_config
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}
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}
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- bool BackEnd::ComputeHogOutputImageFormat (pisp_image_format_config &fmt, pisp_image_format_config const &ifmt) const
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- {
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- fmt.format = be_config_.hog .compute_signed ? PISP_IMAGE_FORMAT_HOG_SIGNED : PISP_IMAGE_FORMAT_HOG_UNSIGNED;
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- fmt.stride2 = 0 ;
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-
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- if (be_config_.global .rgb_enables & PISP_BE_RGB_ENABLE_HOG)
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- {
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- uint16_t w, h;
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-
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- getOutputSize (PISP_BACK_END_HOG_OUTPUT, &w, &h, ifmt);
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- // Configure HoG dimensions. The hardware only generates output for each complete cell.
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- fmt.width = w / HogCellSize;
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- fmt.height = h / HogCellSize;
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- compute_stride (fmt);
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- return true ;
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- }
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- else
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- {
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- fmt.width = 0 ;
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- fmt.height = 0 ;
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- fmt.stride = 0 ;
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- return false ;
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- }
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- }
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-
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void BackEnd::Prepare (pisp_be_tiles_config *config)
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{
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PISP_LOG (debug, " New frame!" );
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- bool integral_image_output = false ;
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-
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// On every start-of-frame we:
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// 1. Check the input configuration appears sensible.
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if ((be_config_.global .bayer_enables & PISP_BE_BAYER_ENABLE_INPUT) == 0 &&
@@ -1058,7 +995,7 @@ void BackEnd::Prepare(pisp_be_tiles_config *config)
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(be_config_.global .rgb_enables & PISP_BE_RGB_ENABLE_INPUT))
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throw std::runtime_error (" BackEnd::preFrameUpdate: both Bayer and RGB inputs are enabled" );
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- // 2. Also check the output configuration (including HOG) is all filled in and looks sensible. Again, addresses must be
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+ // 2. Also check the output configuration is all filled in and looks sensible. Again, addresses must be
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// left to the HAL.
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for (unsigned int i = 0 ; i < variant_.BackEndNumBranches (0 ); i++)
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{
@@ -1067,26 +1004,15 @@ void BackEnd::Prepare(pisp_be_tiles_config *config)
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if (image_config.format & PISP_IMAGE_FORMAT_INTEGRAL_IMAGE)
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{
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- if (!variant_.BackEndIntegralImage (0 , i))
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- throw std::runtime_error (" Integral images are not supported in the current configuration." );
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- integral_image_output = true ;
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+ throw std::runtime_error (" Integral images are not supported." );
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}
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}
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- if (be_config_.global .rgb_enables & PISP_BE_RGB_ENABLE_HOG)
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- {
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- ComputeHogOutputImageFormat (be_config_.hog_format , be_config_.input_format );
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- be_config_.hog .stride = be_config_.hog_format .stride ;
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- }
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-
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// 3. Fill in any other missing bits of config, and update the tiling if necessary.
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updateSmartResize ();
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finaliseConfig ();
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updateTiles ();
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- // Integral images are only valid for a single tile output.
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- PISP_ASSERT ((num_tiles_x_ * num_tiles_y_ == 1 ) || !integral_image_output);
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-
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if (config)
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{ // Allow passing of empty pointer, if only be_config_ should be filled
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// 4. Write the config and tiles to the provided buffer to send to the hardware.
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