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backend: Remove HOG and Integral Image support
We don't plan ever to use HOG from libcamera. Remove support. [2712 chip tests that exercise HOG must link libpisp v1.0.2] No PiSP hardware supports Integral Images, nor is it planned. Don't dump config.axi for debug; it's not strictly part of the HW job config, and has never been configured or read.
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6 files changed

+11
-110
lines changed

6 files changed

+11
-110
lines changed

src/libpisp/backend/backend.cpp

Lines changed: 5 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -38,8 +38,11 @@ void BackEnd::SetGlobal(pisp_be_global_config const &global)
3838
uint32_t changed_rgb_enables = (global.rgb_enables ^ be_config_.global.rgb_enables);
3939

4040
if (changed_rgb_enables & (PISP_BE_RGB_ENABLE_DOWNSCALE0 | PISP_BE_RGB_ENABLE_DOWNSCALE1 |
41-
PISP_BE_RGB_ENABLE_RESAMPLE0 | PISP_BE_RGB_ENABLE_RESAMPLE1 | PISP_BE_RGB_ENABLE_HOG))
42-
retile_ = true; // must retile when rescaling OR HoG blocks change
41+
PISP_BE_RGB_ENABLE_RESAMPLE0 | PISP_BE_RGB_ENABLE_RESAMPLE1))
42+
retile_ = true; // must retile when rescale change
43+
44+
if (global.rgb_enables & PISP_BE_RGB_ENABLE_HOG)
45+
throw std::runtime_error("HOG output is not supported.");
4346

4447
be_config_.dirty_flags_bayer |=
4548
(global.bayer_enables & ~be_config_.global.bayer_enables); // label anything newly enabled as dirty
@@ -382,28 +385,12 @@ void BackEnd::SetOutputFormat(unsigned int i, pisp_be_output_format_config const
382385
{
383386
PISP_ASSERT(i < variant_.BackEndNumBranches(0));
384387
be_config_.output_format[i] = output_format;
385-
386-
if (output_format.image.format & PISP_IMAGE_FORMAT_INTEGRAL_IMAGE)
387-
{
388-
// If this is an integral image request, we must constrain the format parameters!
389-
be_config_.output_format[i].image.format = PISP_IMAGE_FORMAT_INTEGRAL_IMAGE +
390-
PISP_IMAGE_FORMAT_PLANARITY_PLANAR + PISP_IMAGE_FORMAT_SAMPLING_444 +
391-
(output_format.image.format & PISP_IMAGE_FORMAT_SHIFT_MASK) +
392-
(output_format.image.format & PISP_IMAGE_FORMAT_THREE_CHANNEL);
393-
}
394388
be_config_.output_format[i].pad[0] = be_config_.output_format[i].pad[1] = be_config_.output_format[i].pad[2] = 0;
395389
be_config_.dirty_flags_rgb |= PISP_BE_RGB_ENABLE_OUTPUT(i);
396390
// Should only need a retile if the transform has changed, othwise a finalise_tile will do.
397391
retile_ = true;
398392
}
399393

400-
void BackEnd::SetHog(pisp_be_hog_config const &hog)
401-
{
402-
be_config_.hog = hog;
403-
be_config_.dirty_flags_rgb |= PISP_BE_RGB_ENABLE_HOG;
404-
finalise_tiling_ = true;
405-
}
406-
407394
void BackEnd::GetOutputFormat(unsigned int i, pisp_be_output_format_config &output_format) const
408395
{
409396
PISP_ASSERT(i < variant_.BackEndNumBranches(0));

src/libpisp/backend/backend.hpp

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -111,7 +111,6 @@ class BackEnd
111111
void SetDownscale(unsigned int i, pisp_be_downscale_config const &downscale,
112112
pisp_be_downscale_extra const &downscale_extra);
113113
void SetDownscale(unsigned int i, pisp_be_downscale_extra const &downscale_extra);
114-
void SetHog(pisp_be_hog_config const &hog);
115114

116115
void InitialiseYcbcr(pisp_be_ccm_config &ycbcr, const std::string &colour_space);
117116
void InitialiseYcbcrInverse(pisp_be_ccm_config &ycbcr_inverse, const std::string &colour_space);
@@ -123,8 +122,6 @@ class BackEnd
123122

124123
bool ComputeOutputImageFormat(unsigned int i, pisp_image_format_config &output_format,
125124
pisp_image_format_config const &input_format) const;
126-
bool ComputeHogOutputImageFormat(pisp_image_format_config &output_format,
127-
pisp_image_format_config const &input_format) const;
128125

129126
void SetSmartResize(unsigned int i, SmartResize const &smart_resize);
130127

src/libpisp/backend/backend_debug.cpp

Lines changed: 1 addition & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -419,16 +419,8 @@ const std::vector<config_block> be_config {
419419
{ "channel_mix", offsetof(pisp_be_hog_config, channel_mix), sizeof(uint8_t), PISP_ARRAY_SIZE(pisp_be_hog_config, channel_mix) },
420420
{ "stride", offsetof(pisp_be_hog_config, stride), sizeof(uint32_t), 1 },
421421
}
422-
},
423-
{
424-
"axi", offsetof(pisp_be_config, axi),
425-
{
426-
{ "r_qos", offsetof(pisp_be_axi_config, r_qos), sizeof(uint8_t), 1 },
427-
{ "r_cache_prot", offsetof(pisp_be_axi_config, r_cache_prot), sizeof(uint8_t), 1 },
428-
{ "w_qos", offsetof(pisp_be_axi_config, w_qos), sizeof(uint8_t), 1 },
429-
{ "w_cache_prot", offsetof(pisp_be_axi_config, w_cache_prot), sizeof(uint8_t), 1 },
430-
}
431422
}
423+
/* The "axi" field here is never configured or used; the real BE_AXI register is not part of the config */
432424
};
433425

434426
const config_block tiles_config {

src/libpisp/backend/backend_prepare.cpp

Lines changed: 2 additions & 76 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,6 @@ constexpr unsigned int UnityScale = 1 << 12;
3030
constexpr unsigned int ResamplePrecision = 10;
3131
constexpr unsigned int NumPhases = 16;
3232
constexpr unsigned int NumTaps = 6;
33-
// HoG feature constants
34-
constexpr unsigned int HogCellSize = 8;
3533

3634
void check_stride(pisp_image_format_config const &config)
3735
{
@@ -487,9 +485,6 @@ void BackEnd::finaliseConfig()
487485
{
488486
bool enabled = be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_OUTPUT(j);
489487

490-
if (j == PISP_BACK_END_HOG_OUTPUT)
491-
enabled |= be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_HOG;
492-
493488
if (enabled)
494489
{
495490
// crop is enabled when it contains non-zero width/height
@@ -532,7 +527,6 @@ void BackEnd::finaliseConfig()
532527
for (unsigned int i = 0; i < variant_.BackEndNumBranches(0); i++)
533528
output_enables |= be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_OUTPUT(i);
534529

535-
output_enables |= be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_HOG;
536530
if (output_enables == 0)
537531
throw std::runtime_error("BackEnd::finalise: PiSP not configured to do anything");
538532
}
@@ -718,20 +712,6 @@ void BackEnd::updateTiles()
718712
calculate_output_alignment(c.output_format[i].image.format, PISP_BACK_END_OUTPUT_MIN_ALIGN);
719713
}
720714

721-
// If HOG output is enabled, but the corresponding regular output isn't, we'll have to for that branch to get tiled up too.
722-
if ((c.global.rgb_enables & PISP_BE_RGB_ENABLE_OUTPUT(PISP_BACK_END_HOG_OUTPUT)) == 0 &&
723-
(c.global.rgb_enables & PISP_BE_RGB_ENABLE_HOG))
724-
{
725-
uint16_t width, height;
726-
727-
getOutputSize(PISP_BACK_END_HOG_OUTPUT, &width, &height, be_config_.input_format);
728-
tiling_config.output_image_size[PISP_BACK_END_HOG_OUTPUT] = tiling::Length2(width, height);
729-
tiling_config.output_min_alignment[PISP_BACK_END_HOG_OUTPUT] =
730-
tiling::Length2(8, 1); // I think 8 is basically right
731-
tiling_config.output_max_alignment[PISP_BACK_END_HOG_OUTPUT] =
732-
tiling::Length2(32, 1); // and this one probably doesn't much matter
733-
}
734-
735715
tiling_config.max_tile_size.dx = config_.max_tile_width ? config_.max_tile_width
736716
: variant_.BackEndMaxTileWidth(0);
737717
tiling_config.max_tile_size.dy = config_.max_stripe_height ? config_.max_stripe_height : MaxStripeHeight;
@@ -793,9 +773,6 @@ std::vector<pisp_tile> BackEnd::retilePipeline(TilingConfig const &tiling_config
793773
{
794774
bool enabled = (be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_OUTPUT(j));
795775

796-
if (j == PISP_BACK_END_HOG_OUTPUT)
797-
enabled |= (be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_HOG);
798-
799776
if (enabled && (tiles[i].output[j].output.x.length == 0 || tiles[i].output[j].output.y.length == 0))
800777
{
801778
// If a tile produces no output there's no point sending anything down this branch, so ensure the crop
@@ -959,19 +936,6 @@ void BackEnd::finaliseTiling()
959936
PISP_LOG(debug, "Branch " << j << " output offsets " << t.output_offset_x[j] << "," << t.output_offset_y[j]
960937
<< " address offsets " << t.output_addr_offset[j] << " and "
961938
<< t.output_addr_offset2[j]);
962-
963-
if (j == PISP_BACK_END_HOG_OUTPUT)
964-
{
965-
if (be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_HOG)
966-
{
967-
// Convert image dimenstions to cell dimensions. Remember, these are cell offsets.
968-
// Use *unflipped* offsets as HOG doesn't flip its output.
969-
int cell_offset_x = output_offset_x_unflipped / HogCellSize;
970-
int cell_offset_y = output_offset_y_unflipped / HogCellSize;
971-
compute_addr_offset(be_config_.hog_format, cell_offset_x, cell_offset_y, &t.output_hog_addr_offset,
972-
nullptr);
973-
}
974-
}
975939
}
976940
}
977941
}
@@ -1018,37 +982,10 @@ bool BackEnd::ComputeOutputImageFormat(unsigned int i, pisp_image_format_config
1018982
}
1019983
}
1020984

1021-
bool BackEnd::ComputeHogOutputImageFormat(pisp_image_format_config &fmt, pisp_image_format_config const &ifmt) const
1022-
{
1023-
fmt.format = be_config_.hog.compute_signed ? PISP_IMAGE_FORMAT_HOG_SIGNED : PISP_IMAGE_FORMAT_HOG_UNSIGNED;
1024-
fmt.stride2 = 0;
1025-
1026-
if (be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_HOG)
1027-
{
1028-
uint16_t w, h;
1029-
1030-
getOutputSize(PISP_BACK_END_HOG_OUTPUT, &w, &h, ifmt);
1031-
// Configure HoG dimensions. The hardware only generates output for each complete cell.
1032-
fmt.width = w / HogCellSize;
1033-
fmt.height = h / HogCellSize;
1034-
compute_stride(fmt);
1035-
return true;
1036-
}
1037-
else
1038-
{
1039-
fmt.width = 0;
1040-
fmt.height = 0;
1041-
fmt.stride = 0;
1042-
return false;
1043-
}
1044-
}
1045-
1046985
void BackEnd::Prepare(pisp_be_tiles_config *config)
1047986
{
1048987
PISP_LOG(debug, "New frame!");
1049988

1050-
bool integral_image_output = false;
1051-
1052989
// On every start-of-frame we:
1053990
// 1. Check the input configuration appears sensible.
1054991
if ((be_config_.global.bayer_enables & PISP_BE_BAYER_ENABLE_INPUT) == 0 &&
@@ -1058,7 +995,7 @@ void BackEnd::Prepare(pisp_be_tiles_config *config)
1058995
(be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_INPUT))
1059996
throw std::runtime_error("BackEnd::preFrameUpdate: both Bayer and RGB inputs are enabled");
1060997

1061-
// 2. Also check the output configuration (including HOG) is all filled in and looks sensible. Again, addresses must be
998+
// 2. Also check the output configuration is all filled in and looks sensible. Again, addresses must be
1062999
// left to the HAL.
10631000
for (unsigned int i = 0; i < variant_.BackEndNumBranches(0); i++)
10641001
{
@@ -1067,26 +1004,15 @@ void BackEnd::Prepare(pisp_be_tiles_config *config)
10671004

10681005
if (image_config.format & PISP_IMAGE_FORMAT_INTEGRAL_IMAGE)
10691006
{
1070-
if (!variant_.BackEndIntegralImage(0, i))
1071-
throw std::runtime_error("Integral images are not supported in the current configuration.");
1072-
integral_image_output = true;
1007+
throw std::runtime_error("Integral images are not supported.");
10731008
}
10741009
}
10751010

1076-
if (be_config_.global.rgb_enables & PISP_BE_RGB_ENABLE_HOG)
1077-
{
1078-
ComputeHogOutputImageFormat(be_config_.hog_format, be_config_.input_format);
1079-
be_config_.hog.stride = be_config_.hog_format.stride;
1080-
}
1081-
10821011
// 3. Fill in any other missing bits of config, and update the tiling if necessary.
10831012
updateSmartResize();
10841013
finaliseConfig();
10851014
updateTiles();
10861015

1087-
// Integral images are only valid for a single tile output.
1088-
PISP_ASSERT((num_tiles_x_ * num_tiles_y_ == 1) || !integral_image_output);
1089-
10901016
if (config)
10911017
{ // Allow passing of empty pointer, if only be_config_ should be filled
10921018
// 4. Write the config and tiles to the provided buffer to send to the hardware.

src/libpisp/backend/tiling/pisp_tiling.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,7 @@ void tile_pipeline(TilingConfig const &config, Tile *tiles, int num_tiles, Lengt
6464
std::unique_ptr<Stage> downscale_stages[NumOutputBranches];
6565
std::unique_ptr<Stage> resample_stages[NumOutputBranches];
6666
std::unique_ptr<Stage> output_stages[NumOutputBranches];
67-
std::unique_ptr<Stage> hog_stage;
67+
6868
for (int i = 0; i < NumOutputBranches; i++)
6969
{
7070
Length2 const &output_image_size = config.output_image_size[i];
@@ -114,4 +114,4 @@ void tile_pipeline(TilingConfig const &config, Tile *tiles, int num_tiles, Lengt
114114
PISP_LOG(info, "Made " << grid->dx << "x" << grid->dy << " tiles");
115115
}
116116

117-
} // namespace libpisp
117+
} // namespace libpisp

src/libpisp/backend/tiling/pisp_tiling.hpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,6 @@ struct Tile
2525
tiling::Region crop;
2626
tiling::Region downscale[NumOutputBranches];
2727
tiling::Region resample[NumOutputBranches];
28-
tiling::Region hog;
2928
tiling::Region output[NumOutputBranches];
3029
};
3130

@@ -66,4 +65,4 @@ inline std::ostream &operator<<(std::ostream &os, TilingConfig const &tc)
6665

6766
void tile_pipeline(TilingConfig const &config, Tile *tile, int num_tile, tiling::Length2 *grid);
6867

69-
} // namespace libpisp
68+
} // namespace libpisp

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