Junior FPGA Engineer @ Q*Bird B.V.
Computer and Embedded Systems Engineering MSc graduate @ TU Delft.
-
Q*Bird B.V.
- Delft, The Netherlands
- https://it.linkedin.com/in/raffaele-meloni-886a1a208
Pinned Loading
-
tywaves-chisel
tywaves-chisel PublicA repository that implements Tywaves: enabling a type-based waveform debugging for Chisel and Tydi-Chisel. Mapping from Chisel level code to values dumped by simulators is now possible thanks to Ty…
Scala 27
-
Tydi-Chisel-testing-frameworks-analysis
Tydi-Chisel-testing-frameworks-analysis PublicAn analysis of available testing frameworks for Tydi-Chisel
-
-
soil-segmentation-zcu102
soil-segmentation-zcu102 PublicA heterogeneous implementation (SW/HW) of an image processing algorithm running on a Yocto-linux OS
Verilog 1
-
-
chisel
chisel PublicForked from chipsalliance/chisel
Chisel: A Modern Hardware Design Language
Scala
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.