Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Fix parsing of memory operands for x87 FPU instructions ##arch #23896

Merged
merged 1 commit into from
Jan 14, 2025
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
35 changes: 24 additions & 11 deletions libr/arch/p/x86/plugin_cs.c
Original file line number Diff line number Diff line change
Expand Up @@ -2914,17 +2914,25 @@ static void anop(RArchSession *a, RAnalOp *op, ut64 addr, const ut8 *buf, int le
break;
case X86_INS_FBLD:
case X86_INS_FBSTP:
case X86_INS_FINCSTP:
case X86_INS_FNSTCW:
case X86_INS_FNSTSW:
case X86_INS_FRSTOR:
case X86_INS_FNSAVE:
case X86_INS_FNSTENV:
case X86_INS_FXSAVE:
case X86_INS_FXSAVE64:
case X86_INS_FISTTP:
op0_memimmhandle (op, insn, addr, regsz);
/* fallthu */
case X86_INS_FCOMPP:
case X86_INS_FDECSTP:
case X86_INS_FEMMS:
case X86_INS_FFREE:
case X86_INS_FICOM:
case X86_INS_FICOMP:
case X86_INS_FINCSTP:
case X86_INS_FNCLEX:
case X86_INS_FNINIT:
case X86_INS_FNSTCW:
case X86_INS_FNSTSW:
case X86_INS_FPATAN:
case X86_INS_FPREM:
case X86_INS_FPREM1:
Expand All @@ -2933,19 +2941,13 @@ static void anop(RArchSession *a, RAnalOp *op, ut64 addr, const ut8 *buf, int le
case X86_INS_FFREEP:
#endif
case X86_INS_FRNDINT:
case X86_INS_FRSTOR:
case X86_INS_FNSAVE:
case X86_INS_FSCALE:
case X86_INS_FSETPM:
case X86_INS_FSINCOS:
case X86_INS_FNSTENV:
case X86_INS_FXAM:
case X86_INS_FXSAVE:
case X86_INS_FXSAVE64:
case X86_INS_FXTRACT:
case X86_INS_FYL2X:
case X86_INS_FYL2XP1:
case X86_INS_FISTTP:
case X86_INS_FSQRT:
case X86_INS_FXCH:
op->family = R_ANAL_OP_FAMILY_FPU;
Expand All @@ -2964,13 +2966,16 @@ static void anop(RArchSession *a, RAnalOp *op, ut64 addr, const ut8 *buf, int le
case X86_INS_BTR:
case X86_INS_BTS:
op->type = R_ANAL_OP_TYPE_CMP;
op0_memimmhandle (op, insn, addr, regsz);
break;
case X86_INS_FABS:
op->type = R_ANAL_OP_TYPE_ABS;
op->family = R_ANAL_OP_FAMILY_FPU;
break;
case X86_INS_FLDCW:
case X86_INS_FLDENV:
op0_memimmhandle (op, insn, addr, regsz);
/* fallthru */
case X86_INS_FLDL2E:
case X86_INS_FLDL2T:
case X86_INS_FLDLG2:
Expand All @@ -2986,14 +2991,18 @@ static void anop(RArchSession *a, RAnalOp *op, ut64 addr, const ut8 *buf, int le
case X86_INS_FISTP:
case X86_INS_FST:
case X86_INS_FSTP:
case X86_INS_FSTPNCE:
case X86_INS_FXRSTOR:
case X86_INS_FXRSTOR64:
op0_memimmhandle (op, insn, addr, regsz);
/* fallthru */
case X86_INS_FSTPNCE:
op->type = R_ANAL_OP_TYPE_STORE;
op->family = R_ANAL_OP_FAMILY_FPU;
break;
case X86_INS_FDIV:
case X86_INS_FIDIV:
op0_memimmhandle (op, insn, addr, regsz);
/* fallthru */
case X86_INS_FDIVP:
case X86_INS_FDIVR:
case X86_INS_FIDIVR:
Expand All @@ -3003,15 +3012,19 @@ static void anop(RArchSession *a, RAnalOp *op, ut64 addr, const ut8 *buf, int le
break;
case X86_INS_FSUBR:
case X86_INS_FISUBR:
case X86_INS_FSUBRP:
case X86_INS_FSUB:
case X86_INS_FISUB:
op0_memimmhandle (op, insn, addr, regsz);
/* fallthru */
case X86_INS_FSUBRP:
case X86_INS_FSUBP:
op->type = R_ANAL_OP_TYPE_SUB;
op->family = R_ANAL_OP_FAMILY_FPU;
break;
case X86_INS_FMUL:
case X86_INS_FIMUL:
op0_memimmhandle (op, insn, addr, regsz);
/* fallthru */
case X86_INS_FMULP:
op->type = R_ANAL_OP_TYPE_MUL;
op->family = R_ANAL_OP_FAMILY_FPU;
Expand Down
2 changes: 1 addition & 1 deletion test/db/esil/x86_32
Original file line number Diff line number Diff line change
Expand Up @@ -2303,7 +2303,7 @@ EXPECT=<<EOF
{
"offset": 0,
"esil": "0,cf,:=,32,eax,%,1,<<,32,eax,/,esp,+,[4],&,?{,1,cf,:=,},32,eax,%,1,<<,32,eax,/,esp,+,|=[4]",
"refptr": 0,
"refptr": 4,
"fcn_addr": 0,
"fcn_last": 0,
"size": 4,
Expand Down
Loading