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Fixed the crash when running at 48MHz #12

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Nov 14, 2024
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9 changes: 9 additions & 0 deletions src/rcc/f030.rs
Original file line number Diff line number Diff line change
Expand Up @@ -185,6 +185,15 @@ pub(crate) unsafe fn init(config: Config) {
// }
// });

// Temporarily: set flash latency
if hclk1.0 > 24_000_000 {
unsafe {
let acr_reg = 0x4002_2000 as *mut u32;
let value = acr_reg.read_volatile() | 0x1;
acr_reg.write_volatile(value);
}
}

// Set prescalers
// CFGR has been written before (PLL, PLL48) don't overwrite these settings
RCC.cfgr().modify(|w| {
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