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Redo the increment device in Cava2. #904

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@fshaked fshaked commented Aug 17, 2021

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@fshaked fshaked requested a review from samuelgruetter August 17, 2021 12:17
firmware/IncrementWait/CavaIncrementDevice.v Outdated Show resolved Hide resolved
firmware/IncrementWait/CavaIncrementDevice.v Outdated Show resolved Hide resolved
let '(s', (is_resp, resp)) := step incr s (bool_to_dbit is_read_req,
(bool_to_dbit is_write_req,
(req_addr, (req_value, tt)))) in
(s', (dbit_to_bool is_resp, resp)).
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Seeing all these bool_to_dbit and dbit_to_bool conversions makes me wonder whether Notation Bit := (BitVec 1) in Cava2 was really a good idea... Why not add back a separate Bit type that gets denoted to bool? (/cc @jadephilipoom and @blaxill)

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Yeah, I think it might be a good idea to add this back. My initial rationale for removing it was to avoid duplication of bitwise operations, but I think logically you really do want to sometimes reason about numbers and sometimes just reason about booleans.

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bool_to_dbit and dbit_to_bool are not really necessary, I just didn't want to change the device class while cava2 was changing. The bool/number distinction doesn't affect the proof below much (though it might for other proofs). That said, it feels weird to use N instead of bool.

firmware/IncrementWait/CavaIncrementDevice.v Outdated Show resolved Hide resolved

Axiom TODO: False.
Axiom TODO: Coq.Init.Logic.False.
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Does False here still refer to Cava's False? That doesn't sound right, can we put it into a Notations module that gets only imported inside sections where we really want it?

+ (* DONE_related: *)
cbn. rewrite andb_false_r. cbn. assumption.
change (0%N) at 1 with (bool_to_dbit false).
change (1%N) with (bool_to_dbit true).
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More code suggesting that we should consider again a separate Bit type that gets denoted to bool, /cc @jadephilipoom @blaxill

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Looks great! (And I think the CI failure is due to #893)

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@fshaked fshaked merged commit 7ec64d2 into project-oak:main Aug 20, 2021
@fshaked fshaked deleted the incwait-cava2 branch August 20, 2021 10:16
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3 participants