ise_hammer: 6s IOI.

docs/xilinx/spartan6/index.rst

@@ -12,6 +12,7 @@ Spartan 6
    bram
    dsp
    clock
+   io
    mcb
    pcie
    gtp

docs/xilinx/spartan6/io.rst

@@ -0,0 +1,17 @@
+Input/Output
+############
+
+
+Bitstream — ``IOI.LR``
+======================
+
+.. raw:: html
+   :file: ../gen/tile-xc6s-IOI.LR.html
+
+
+Bitstream — ``IOI.BT``
+======================
+
+.. raw:: html
+   :file: ../gen/tile-xc6s-IOI.BT.html
+

prjcombine_ise_hammer/src/clb/virtex.rs

@@ -330,7 +330,7 @@ pub fn collect_fuzzers(ctx: &mut CollectorCtx) {
         ctx.state
             .get_diff(tile, bel, "SYNC_ATTR", "ASYNC")
             .assert_empty();
-        ctx.tiledb.insert(tile, bel, "FF_SYNC", xlat_bit(ff_sync));
+        ctx.tiledb.insert(tile, bel, "FF_SR_SYNC", xlat_bit(ff_sync));
 
         let revused = ctx.state.get_diff(tile, bel, "REVUSED", "0");
         ctx.tiledb

prjcombine_ise_hammer/src/clb/virtex2.rs

@@ -870,7 +870,7 @@ pub fn collect_fuzzers(ctx: &mut CollectorCtx) {
 
         // FFs
         let item = ctx.extract_enum_bool("CLB", bel, "SYNC_ATTR", "ASYNC", "SYNC");
-        ctx.tiledb.insert("CLB", bel, "FF_SYNC", item);
+        ctx.tiledb.insert("CLB", bel, "FF_SR_SYNC", item);
 
         let ff_latch = ctx.state.get_diff("CLB", bel, "FFX", "#LATCH");
         assert_eq!(ff_latch, ctx.state.get_diff("CLB", bel, "FFY", "#LATCH"));

prjcombine_ise_hammer/src/clb/virtex5.rs

@@ -1084,7 +1084,7 @@ pub fn collect_fuzzers(ctx: &mut CollectorCtx) {
             ctx.state
                 .get_diff(tile, bel, "SYNC_ATTR", "ASYNC")
                 .assert_empty();
-            ctx.tiledb.insert(tile, bel, "FF_SYNC", xlat_bit(ff_sync));
+            ctx.tiledb.insert(tile, bel, "FF_SR_SYNC", xlat_bit(ff_sync));
             ctx.collect_inv(tile, bel, "CLK");
             if mode == Mode::Virtex5 {
                 let revused = ctx.state.get_diff(tile, bel, "REVUSED", "0");

prjcombine_ise_hammer/src/fgen.rs

@@ -4551,6 +4551,7 @@ pub enum ExtraFeatureKind {
     HclkIoiInnerSide(Dir),
     HclkIoiHere(NodeKindId),
     AllBankIo,
+    AllMcbIoi,
 }
 
 impl ExtraFeatureKind {
@@ -5626,6 +5627,32 @@ impl ExtraFeatureKind {
                     })
                     .collect()
             }
+            ExtraFeatureKind::AllMcbIoi => {
+                let ExpandedDevice::Spartan6(edev) = backend.edev else {
+                    unreachable!()
+                };
+                let mut res = vec![];
+                for row in backend.egrid.die(loc.0).rows() {
+                    if let Some(split) = edev.grid.row_mcb_split {
+                        if loc.2 < split && row >= split {
+                            continue;
+                        }
+                        if loc.2 >= split && row < split {
+                            continue;
+                        }
+                    }
+                    if backend
+                        .egrid
+                        .find_node(loc.0, (loc.1, row), |node| {
+                            backend.egrid.db.nodes.key(node.kind) == "IOI.LR"
+                        })
+                        .is_some()
+                    {
+                        res.push(vec![edev.btile_main(loc.1, row)]);
+                    }
+                }
+                res
+            }
         }
     }
 }

prjcombine_ise_hammer/src/fuzz.rs

@@ -172,6 +172,9 @@ macro_rules! fuzz_base {
     ($ctx:ident, (bel_mode $bel:expr, $kind:expr)) => {
         $crate::fgen::TileKV::Bel($bel, $crate::fgen::BelKV::Mode($kind.to_string()))
     };
+    ($ctx:ident, (unused)) => {
+        $crate::fgen::TileKV::Bel($ctx.bel, $crate::fgen::BelKV::Unused)
+    };
     ($ctx:ident, (bel_unused $bel:expr)) => {
         $crate::fgen::TileKV::Bel($bel, $crate::fgen::BelKV::Unused)
     };

prjcombine_ise_hammer/src/io.rs

@@ -1,5 +1,6 @@
 pub mod fpgacore;
 pub mod iostd;
+pub mod spartan6;
 pub mod virtex;
 pub mod virtex2;
 pub mod virtex4;

prjcombine_ise_hammer/src/io/fpgacore.rs

@@ -199,7 +199,7 @@ pub fn collect_fuzzers(ctx: &mut CollectorCtx) {
         let item = ctx.extract_enum_bool(tile, bel, "IFF", "#FF", "#LATCH");
         ctx.tiledb.insert(tile, bel, "FF_LATCH", item);
         let item = ctx.extract_enum_bool(tile, bel, "IFFATTRBOX", "ASYNC", "SYNC");
-        ctx.tiledb.insert(tile, bel, "FF_SYNC", item);
+        ctx.tiledb.insert(tile, bel, "FF_SR_SYNC", item);
         let item = ctx.extract_enum_bool(tile, bel, "IFF_INIT_ATTR", "INIT0", "INIT1");
         ctx.tiledb.insert(tile, bel, "FF_INIT", item);
         let item = ctx.extract_enum_bool(tile, bel, "IFF_SR_ATTR", "SRLOW", "SRHIGH");
@@ -244,7 +244,7 @@ pub fn collect_fuzzers(ctx: &mut CollectorCtx) {
         let item = ctx.extract_enum_bool(tile, bel, "OFF", "#FF", "#LATCH");
         ctx.tiledb.insert(tile, bel, "FF_LATCH", item);
         let item = ctx.extract_enum_bool(tile, bel, "OFFATTRBOX", "ASYNC", "SYNC");
-        ctx.tiledb.insert(tile, bel, "FF_SYNC", item);
+        ctx.tiledb.insert(tile, bel, "FF_SR_SYNC", item);
         let item = ctx.extract_enum_bool(tile, bel, "OFF_INIT_ATTR", "INIT0", "INIT1");
         ctx.tiledb.insert(tile, bel, "FF_INIT", item);
         let item = ctx.extract_enum_bool(tile, bel, "OFF_SR_ATTR", "SRLOW", "SRHIGH");