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ise_hammer: 2v TBUS joiner, 5v/... CYINIT.
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wanda-phi committed May 31, 2024
1 parent 93b2347 commit 5c7a549
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Showing 13 changed files with 137 additions and 26 deletions.
2 changes: 1 addition & 1 deletion databases/xc2v-tiledb.json

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2 changes: 1 addition & 1 deletion databases/xc5v-tiledb.json

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2 changes: 1 addition & 1 deletion databases/xc6s-tiledb.json

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2 changes: 1 addition & 1 deletion databases/xc6v-tiledb.json

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2 changes: 1 addition & 1 deletion databases/xc7v-tiledb.json

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30 changes: 27 additions & 3 deletions prjcombine_ise_hammer/src/clb/virtex2.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@ use prjcombine_xilinx_geom::ExpandedDevice;
use unnamed_entity::EntityId;

use crate::{
backend::IseBackend,
backend::{IseBackend, SimpleFeatureId},
diff::{xlat_bitvec, xlat_enum, CollectorCtx, Diff},
fgen::TileBits,
fgen::{TileBits, TileFuzzKV, TileFuzzerGen, TileRelation, TileWire},
fuzz::FuzzCtx,
fuzz_enum, fuzz_multi, fuzz_one,
};
Expand Down Expand Up @@ -626,7 +626,25 @@ pub fn add_fuzzers<'a>(session: &mut Session<IseBackend<'a>>, backend: &IseBacke
fuzz_one!(ctx, "OUT_A", "1", [(row_mutex_site "TBUF")], [(pip (pin "O"), (bel_pin tbus_bel, out_a))]);
fuzz_one!(ctx, "OUT_B", "1", [(row_mutex_site "TBUF")], [(pip (pin "O"), (bel_pin tbus_bel, out_b))]);
}
// TODO: TBUS joiner
let bel = BelId::from_idx(6);
session.add_fuzzer(Box::new(TileFuzzerGen {
node: node_kind,
bits: TileBits::Main(1),
feature: SimpleFeatureId {
tile: "CLB",
bel: "TBUS",
attr: "JOINER",
val: "1",
},
base: vec![],
fuzz: vec![TileFuzzKV::TileRelated(
TileRelation::ClbTbusRight,
Box::new(TileFuzzKV::Pip(
TileWire::BelPinNear(bel, "BUS3"),
TileWire::BelPinNear(bel, "BUS3_E"),
)),
)],
}));
}
}

Expand Down Expand Up @@ -998,6 +1016,12 @@ pub fn collect_fuzzers(ctx: &mut CollectorCtx) {
);
}
}
ctx.tiledb.insert(
"CLB",
"TBUS",
"JOINER",
xlat_bitvec(vec![ctx.state.get_diff("CLB", "TBUS", "JOINER", "1")]),
);
}
let egrid = ctx.edev.egrid();
for (node_kind, name, node) in &egrid.db.nodes {
Expand Down
37 changes: 33 additions & 4 deletions prjcombine_ise_hammer/src/clb/virtex5.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@ use prjcombine_xilinx_geom::ExpandedDevice;
use unnamed_entity::EntityId;

use crate::{
backend::IseBackend,
diff::{xlat_bitvec, xlat_enum, CollectorCtx},
fgen::TileBits,
backend::{IseBackend, SimpleFeatureId},
diff::{xlat_bitvec, xlat_enum, CollectorCtx, Diff},
fgen::{TileBits, TileFuzzKV, TileFuzzerGen, TileRelation, TileWire},
fuzz::FuzzCtx,
fuzz_enum, fuzz_multi,
};
Expand Down Expand Up @@ -183,7 +183,24 @@ pub fn add_fuzzers<'a>(session: &mut Session<IseBackend<'a>>, backend: &IseBacke
(pin "COUT")
]);

// TODO: CIN special
ctx.session.add_fuzzer(Box::new(TileFuzzerGen {
node: ctx.node_kind,
bits: ctx.bits,
feature: SimpleFeatureId {
tile: ctx.tile_name,
bel: ctx.bel_name,
attr: "CINUSED",
val: "1",
},
base: vec![],
fuzz: vec![TileFuzzKV::TileRelated(
TileRelation::ClbCinDown,
Box::new(TileFuzzKV::Pip(
TileWire::BelPinNear(bel, "COUT"),
TileWire::BelPinFar(bel, "COUT"),
)),
)],
}));
}

// misc muxes
Expand Down Expand Up @@ -887,6 +904,18 @@ pub fn collect_fuzzers(ctx: &mut CollectorCtx) {
ctx.collect_enum(tile, bel, "CCY0", &["O5", "CX"]);
ctx.collect_enum(tile, bel, "DCY0", &["O5", "DX"]);
ctx.collect_enum(tile, bel, "PRECYINIT", &["AX", "1", "0"]);
ctx.tiledb.insert(
tile,
bel,
"CYINIT",
xlat_enum(vec![
(
"CIN".to_string(),
ctx.state.get_diff(tile, bel, "CINUSED", "1"),
),
("PRECYINIT".to_string(), Diff::default()),
]),
);
}

// misc muxes
Expand Down
4 changes: 3 additions & 1 deletion prjcombine_ise_hammer/src/dsp/spartan3adsp.rs
Original file line number Diff line number Diff line change
Expand Up @@ -90,7 +90,9 @@ pub fn collect_fuzzers(ctx: &mut CollectorCtx) {

for &pin in DSP48A_INVPINS {
match mode {
Mode::Spartan3ADsp => ctx.collect_int_inv(&["INT.BRAM.S3ADSP"; 4], "DSP", "DSP", pin, false),
Mode::Spartan3ADsp => {
ctx.collect_int_inv(&["INT.BRAM.S3ADSP"; 4], "DSP", "DSP", pin, false)
}
Mode::Spartan6 => ctx.collect_inv("DSP", "DSP", pin),
}
}
Expand Down
63 changes: 62 additions & 1 deletion prjcombine_ise_hammer/src/fgen.rs
Original file line number Diff line number Diff line change
Expand Up @@ -19,9 +19,49 @@ pub type Loc = (DieId, ColId, RowId, LayerId);
#[derive(Debug, Copy, Clone)]
pub enum TileWire<'a> {
BelPinNear(BelId, &'a str),
BelPinFar(BelId, &'a str),
IntWire(NodeWireId),
}

fn resolve_tile_relation(
backend: &IseBackend,
mut loc: Loc,
relation: TileRelation,
) -> Option<Loc> {
match relation {
TileRelation::ClbTbusRight => loop {
if loc.1 == backend.egrid.die(loc.0).cols().last().unwrap() {
return None;
}
loc.1 += 1;
if let Some((layer, _)) = backend.egrid.find_node_loc(loc.0, (loc.1, loc.2), |node| {
backend.egrid.db.nodes.key(node.kind) == "CLB"
}) {
loc.3 = layer;
if let ExpandedDevice::Virtex2(edev) = backend.edev {
if loc.1 == edev.grid.col_right() - 1 {
return None;
}
}
return Some(loc);
}
},
TileRelation::ClbCinDown => loop {
if loc.2 == backend.egrid.die(loc.0).rows().last().unwrap() {
return None;
}
loc.2 -= 1;
if let Some((layer, _)) = backend.egrid.find_node_loc(loc.0, (loc.1, loc.2), |node| {
backend.egrid.db.nodes.key(node.kind).starts_with("CLB")
|| backend.egrid.db.nodes.key(node.kind).starts_with("CLEX")
}) {
loc.3 = layer;
return Some(loc);
}
},
}
}

fn resolve_tile_wire<'a>(
backend: &IseBackend<'a>,
loc: Loc,
Expand All @@ -35,6 +75,10 @@ fn resolve_tile_wire<'a>(
let bel_naming = &node_naming.bels[bel];
(&node.names[bel_naming.tile], &bel_naming.pins[pin].name)
}
TileWire::BelPinFar(bel, pin) => {
let bel_naming = &node_naming.bels[bel];
(&node.names[bel_naming.tile], &bel_naming.pins[pin].name_far)
}
TileWire::IntWire(w) => {
backend.egrid.resolve_wire((loc.0, node.tiles[w.0], w.1))?;
(
Expand Down Expand Up @@ -124,7 +168,12 @@ fn resolve_intf_delay<'a>(
backend
.egrid
.resolve_wire((loc.0, node.tiles[wire.0], wire.1))?;
let IntfWireInNaming::Delay { name_out, name_in, name_delay } = node_naming.intf_wires_in.get(&wire)? else {
let IntfWireInNaming::Delay {
name_out,
name_in,
name_delay,
} = node_naming.intf_wires_in.get(&wire)?
else {
unreachable!()
};
Some((
Expand All @@ -135,6 +184,12 @@ fn resolve_intf_delay<'a>(
))
}

#[derive(Debug, Copy, Clone, Eq, PartialEq)]
pub enum TileRelation {
ClbTbusRight,
ClbCinDown,
}

#[derive(Debug)]
pub enum TileKV<'a> {
SiteMode(BelId, &'a str),
Expand Down Expand Up @@ -541,6 +596,7 @@ pub enum TileFuzzKV<'a> {
SiteAttr(BelId, &'a str, &'a str),
#[allow(dead_code)]
SiteAttrDiff(BelId, &'a str, &'a str, &'a str),
#[allow(dead_code)]
SitePin(BelId, &'a str),
GlobalOpt(&'a str, &'a str),
GlobalOptDiff(&'a str, &'a str, &'a str),
Expand All @@ -550,6 +606,7 @@ pub enum TileFuzzKV<'a> {
IntfDelay(NodeWireId, bool),
NodeMutexExclusive(NodeWireId),
TileMutexExclusive(&'a str),
TileRelated(TileRelation, Box<TileFuzzKV<'a>>),
}

impl<'a> TileFuzzKV<'a> {
Expand Down Expand Up @@ -620,6 +677,10 @@ impl<'a> TileFuzzKV<'a> {
TileFuzzKV::TileMutexExclusive(name) => {
fuzzer.fuzz(Key::TileMutex(loc, name), None, "EXCLUSIVE")
}
TileFuzzKV::TileRelated(relation, ref chain) => {
let loc = resolve_tile_relation(backend, loc, relation)?;
chain.apply(backend, loc, fuzzer)?
}
})
}
}
Expand Down
9 changes: 4 additions & 5 deletions prjcombine_ise_hammer/src/intf.rs
Original file line number Diff line number Diff line change
Expand Up @@ -134,11 +134,10 @@ pub fn collect_fuzzers(ctx: &mut CollectorCtx) {
let mut mux_groups = HashSet::new();
for (in_name, mut diff) in mux_inps {
if in_name.contains("IMUX.SR") || in_name.contains("IMUX.CE") {
let mut item = ctx.tiledb.item(
"INT.BRAM.S3ADSP",
"INT",
&format!("INV.{}", &in_name[2..]),
).clone();
let mut item = ctx
.tiledb
.item("INT.BRAM.S3ADSP", "INT", &format!("INV.{}", &in_name[2..]))
.clone();
assert_eq!(item.bits.len(), 1);
item.bits[0].tile = in_name[..1].parse().unwrap();
diff.discard_bits(&item);
Expand Down
2 changes: 1 addition & 1 deletion prjcombine_ise_hammer/src/ppc.rs
Original file line number Diff line number Diff line change
@@ -1 +1 @@
pub mod virtex2;
pub mod virtex2;
2 changes: 1 addition & 1 deletion prjcombine_ise_hammer/src/ppc/virtex2.rs
Original file line number Diff line number Diff line change
Expand Up @@ -61,7 +61,7 @@ pub fn collect_fuzzers(ctx: &mut CollectorCtx) {
continue;
}
let int_tiles = &["INT.PPC"; 48];
let flip = egrid.db.wires.key(wire.1).starts_with("IMUX.SR");
let flip = egrid.db.wires.key(wire.1).starts_with("IMUX.SR");
ctx.collect_int_inv(int_tiles, tile, bel, pin, flip);
}
ctx.state
Expand Down
6 changes: 1 addition & 5 deletions prjcombine_ise_hammer/src/tiledb.rs
Original file line number Diff line number Diff line change
Expand Up @@ -65,11 +65,7 @@ impl TileDb {
&self.tiles[tile].items[&format!("{bel}:{attr}")]
}

pub fn insert_misc_data(
&mut self,
key: impl Into<String>,
val: impl Into<DbValue>,
) {
pub fn insert_misc_data(&mut self, key: impl Into<String>, val: impl Into<DbValue>) {
let key = key.into();
let val = val.into();
match self.misc_data.entry(key) {
Expand Down

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