Skip to content

Commit

Permalink
Deploying to gh-pages from @ 03946a1 πŸš€
Browse files Browse the repository at this point in the history
  • Loading branch information
wanda-phi committed Jun 3, 2024
1 parent 668b791 commit 51fa658
Show file tree
Hide file tree
Showing 14 changed files with 6,689 additions and 7 deletions.
1 change: 1 addition & 0 deletions _sources/xilinx/virtex2/index.rst.txt
Original file line number Diff line number Diff line change
Expand Up @@ -13,4 +13,5 @@ Xilinx Virtex 2 FPGAs
clb
bram
clock
io
corner
109 changes: 109 additions & 0 deletions _sources/xilinx/virtex2/io.rst.txt
Original file line number Diff line number Diff line change
@@ -0,0 +1,109 @@
.. _virtex2-io:

Input / Output β€” Virtex 2, Spartan 3
####################################

.. todo:: document


I/O interface
=============

.. todo:: document


``IOI`` β€” Virtex 2
------------------

.. raw:: html
:file: ../gen-xilinx-tile-xc2v-IOI.html


``IOI.CLK_B`` β€” Virtex 2
------------------------

.. raw:: html
:file: ../gen-xilinx-tile-xc2v-IOI.CLK_B.html


``IOI.CLK_T`` β€” Virtex 2
------------------------

.. raw:: html
:file: ../gen-xilinx-tile-xc2v-IOI.CLK_T.html


``IOI.S3``
----------

.. raw:: html
:file: ../gen-xilinx-tile-xc3s-IOI.S3.html


``IOI.S3E``
-----------

.. raw:: html
:file: ../gen-xilinx-tile-xc3s-IOI.S3E.html


``IOI.S3A.L``
-------------

.. raw:: html
:file: ../gen-xilinx-tile-xc3s-IOI.S3A.L.html


``IOI.S3A.R``
-------------

.. raw:: html
:file: ../gen-xilinx-tile-xc3s-IOI.S3A.R.html


``IOI.S3A.B``
-------------

.. raw:: html
:file: ../gen-xilinx-tile-xc3s-IOI.S3A.B.html


``IOI.S3A.T``
-------------

.. raw:: html
:file: ../gen-xilinx-tile-xc3s-IOI.S3A.T.html


``IOI.S3ADSP.L``
----------------

.. raw:: html
:file: ../gen-xilinx-tile-xc3s-IOI.S3ADSP.L.html


``IOI.S3ADSP.R``
----------------

.. raw:: html
:file: ../gen-xilinx-tile-xc3s-IOI.S3ADSP.R.html


``IOI.S3ADSP.B``
----------------

.. raw:: html
:file: ../gen-xilinx-tile-xc3s-IOI.S3ADSP.B.html


``IOI.S3ADSP.T``
----------------

.. raw:: html
:file: ../gen-xilinx-tile-xc3s-IOI.S3ADSP.T.html


I/O buffers
===========

.. todo:: document
Binary file modified objects.inv
Binary file not shown.
2 changes: 1 addition & 1 deletion searchindex.js

Large diffs are not rendered by default.

1 change: 1 addition & 0 deletions xilinx/index.html
Original file line number Diff line number Diff line change
Expand Up @@ -100,6 +100,7 @@ <h1>Xilinx FPGAs<a class="headerlink" href="#xilinx-fpgas" title="Link to this h
<li class="toctree-l2"><a class="reference internal" href="virtex2/clb.html">Configurable Logic Block</a></li>
<li class="toctree-l2"><a class="reference internal" href="virtex2/bram.html">Block RAM β€” Virtex 2, Spartan 3</a></li>
<li class="toctree-l2"><a class="reference internal" href="virtex2/clock.html">Clock interconnect</a></li>
<li class="toctree-l2"><a class="reference internal" href="virtex2/io.html">Input / Output β€” Virtex 2, Spartan 3</a></li>
<li class="toctree-l2"><a class="reference internal" href="virtex2/corner.html">Corners β€” Virtex 2, Spartan 3</a></li>
</ul>
</li>
Expand Down
1 change: 1 addition & 0 deletions xilinx/virtex2/bram.html
Original file line number Diff line number Diff line change
Expand Up @@ -63,6 +63,7 @@
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="clock.html">Clock interconnect</a></li>
<li class="toctree-l3"><a class="reference internal" href="io.html">Input / Output β€” Virtex 2, Spartan 3</a></li>
<li class="toctree-l3"><a class="reference internal" href="corner.html">Corners β€” Virtex 2, Spartan 3</a></li>
</ul>
</li>
Expand Down
1 change: 1 addition & 0 deletions xilinx/virtex2/clb.html
Original file line number Diff line number Diff line change
Expand Up @@ -66,6 +66,7 @@
</li>
<li class="toctree-l3"><a class="reference internal" href="bram.html">Block RAM β€” Virtex 2, Spartan 3</a></li>
<li class="toctree-l3"><a class="reference internal" href="clock.html">Clock interconnect</a></li>
<li class="toctree-l3"><a class="reference internal" href="io.html">Input / Output β€” Virtex 2, Spartan 3</a></li>
<li class="toctree-l3"><a class="reference internal" href="corner.html">Corners β€” Virtex 2, Spartan 3</a></li>
</ul>
</li>
Expand Down
5 changes: 3 additions & 2 deletions xilinx/virtex2/clock.html
Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,7 @@
<script src="../../_static/js/theme.js"></script>
<link rel="index" title="Index" href="../../genindex.html" />
<link rel="search" title="Search" href="../../search.html" />
<link rel="next" title="Corners β€” Virtex 2, Spartan 3" href="corner.html" />
<link rel="next" title="Input / Output β€” Virtex 2, Spartan 3" href="io.html" />
<link rel="prev" title="Block RAM β€” Virtex 2, Spartan 3" href="bram.html" />
</head>

Expand Down Expand Up @@ -62,6 +62,7 @@
<li class="toctree-l4"><a class="reference internal" href="#dcm-output-bus">DCM output bus</a></li>
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="io.html">Input / Output β€” Virtex 2, Spartan 3</a></li>
<li class="toctree-l3"><a class="reference internal" href="corner.html">Corners β€” Virtex 2, Spartan 3</a></li>
</ul>
</li>
Expand Down Expand Up @@ -3934,7 +3935,7 @@ <h3><code class="docutils literal notranslate"><span class="pre">DCMCONN.TOP</sp
</div>
<footer><div class="rst-footer-buttons" role="navigation" aria-label="Footer">
<a href="bram.html" class="btn btn-neutral float-left" title="Block RAM β€” Virtex 2, Spartan 3" accesskey="p" rel="prev"><span class="fa fa-arrow-circle-left" aria-hidden="true"></span> Previous</a>
<a href="corner.html" class="btn btn-neutral float-right" title="Corners β€” Virtex 2, Spartan 3" accesskey="n" rel="next">Next <span class="fa fa-arrow-circle-right" aria-hidden="true"></span></a>
<a href="io.html" class="btn btn-neutral float-right" title="Input / Output β€” Virtex 2, Spartan 3" accesskey="n" rel="next">Next <span class="fa fa-arrow-circle-right" aria-hidden="true"></span></a>
</div>

<hr/>
Expand Down
5 changes: 3 additions & 2 deletions xilinx/virtex2/corner.html
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@
<link rel="index" title="Index" href="../../genindex.html" />
<link rel="search" title="Search" href="../../search.html" />
<link rel="next" title="Xilinx Spartan 3 FPGAs" href="../spartan3/index.html" />
<link rel="prev" title="Clock interconnect" href="clock.html" />
<link rel="prev" title="Input / Output β€” Virtex 2, Spartan 3" href="io.html" />
</head>

<body class="wy-body-for-nav">
Expand Down Expand Up @@ -56,6 +56,7 @@
<li class="toctree-l3"><a class="reference internal" href="clb.html">Configurable Logic Block</a></li>
<li class="toctree-l3"><a class="reference internal" href="bram.html">Block RAM β€” Virtex 2, Spartan 3</a></li>
<li class="toctree-l3"><a class="reference internal" href="clock.html">Clock interconnect</a></li>
<li class="toctree-l3"><a class="reference internal" href="io.html">Input / Output β€” Virtex 2, Spartan 3</a></li>
<li class="toctree-l3 current"><a class="current reference internal" href="#">Corners β€” Virtex 2, Spartan 3</a><ul>
<li class="toctree-l4"><a class="reference internal" href="#lower-left">Lower left</a></li>
<li class="toctree-l4"><a class="reference internal" href="#upper-left">Upper left</a></li>
Expand Down Expand Up @@ -2059,7 +2060,7 @@ <h3><code class="docutils literal notranslate"><span class="pre">UR.S3A</span></
</div>
</div>
<footer><div class="rst-footer-buttons" role="navigation" aria-label="Footer">
<a href="clock.html" class="btn btn-neutral float-left" title="Clock interconnect" accesskey="p" rel="prev"><span class="fa fa-arrow-circle-left" aria-hidden="true"></span> Previous</a>
<a href="io.html" class="btn btn-neutral float-left" title="Input / Output β€” Virtex 2, Spartan 3" accesskey="p" rel="prev"><span class="fa fa-arrow-circle-left" aria-hidden="true"></span> Previous</a>
<a href="../spartan3/index.html" class="btn btn-neutral float-right" title="Xilinx Spartan 3 FPGAs" accesskey="n" rel="next">Next <span class="fa fa-arrow-circle-right" aria-hidden="true"></span></a>
</div>

Expand Down
6 changes: 6 additions & 0 deletions xilinx/virtex2/index.html
Original file line number Diff line number Diff line change
Expand Up @@ -56,6 +56,7 @@
<li class="toctree-l3"><a class="reference internal" href="clb.html">Configurable Logic Block</a></li>
<li class="toctree-l3"><a class="reference internal" href="bram.html">Block RAM β€” Virtex 2, Spartan 3</a></li>
<li class="toctree-l3"><a class="reference internal" href="clock.html">Clock interconnect</a></li>
<li class="toctree-l3"><a class="reference internal" href="io.html">Input / Output β€” Virtex 2, Spartan 3</a></li>
<li class="toctree-l3"><a class="reference internal" href="corner.html">Corners β€” Virtex 2, Spartan 3</a></li>
</ul>
</li>
Expand Down Expand Up @@ -154,6 +155,11 @@ <h1>Xilinx Virtex 2 FPGAs<a class="headerlink" href="#xilinx-virtex-2-fpgas" tit
<li class="toctree-l2"><a class="reference internal" href="clock.html#dcm-output-bus">DCM output bus</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="io.html">Input / Output β€” Virtex 2, Spartan 3</a><ul>
<li class="toctree-l2"><a class="reference internal" href="io.html#i-o-interface">I/O interface</a></li>
<li class="toctree-l2"><a class="reference internal" href="io.html#i-o-buffers">I/O buffers</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="corner.html">Corners β€” Virtex 2, Spartan 3</a><ul>
<li class="toctree-l2"><a class="reference internal" href="corner.html#lower-left">Lower left</a></li>
<li class="toctree-l2"><a class="reference internal" href="corner.html#upper-left">Upper left</a></li>
Expand Down
3 changes: 2 additions & 1 deletion xilinx/virtex2/interconnect.html
Original file line number Diff line number Diff line change
Expand Up @@ -68,6 +68,7 @@
<li class="toctree-l3"><a class="reference internal" href="clb.html">Configurable Logic Block</a></li>
<li class="toctree-l3"><a class="reference internal" href="bram.html">Block RAM β€” Virtex 2, Spartan 3</a></li>
<li class="toctree-l3"><a class="reference internal" href="clock.html">Clock interconnect</a></li>
<li class="toctree-l3"><a class="reference internal" href="io.html">Input / Output β€” Virtex 2, Spartan 3</a></li>
<li class="toctree-l3"><a class="reference internal" href="corner.html">Corners β€” Virtex 2, Spartan 3</a></li>
</ul>
</li>
Expand Down Expand Up @@ -112,7 +113,7 @@
<ul class="simple">
<li><p><code class="docutils literal notranslate"><span class="pre">INT.CLB</span></code>, the interconnect tile associated with <a class="reference internal" href="clb.html#virtex2-clb"><span class="std std-ref">configurable logic blocks</span></a></p></li>
<li><p><code class="docutils literal notranslate"><span class="pre">INT.BRAM</span></code>, the interconnect tile associated with <a class="reference internal" href="bram.html#virtex2-bram"><span class="std std-ref">block RAMs</span></a></p></li>
<li><p><code class="docutils literal notranslate"><span class="pre">INT.{IOI|IOI.CLK_B|IOI.CLK_T}</span></code>, the interconnect tile associated with <span class="xref std std-ref">I/O tiles</span></p></li>
<li><p><code class="docutils literal notranslate"><span class="pre">INT.{IOI|IOI.CLK_B|IOI.CLK_T}</span></code>, the interconnect tile associated with <a class="reference internal" href="io.html#virtex2-io"><span class="std std-ref">I/O tiles</span></a></p></li>
<li><p><code class="docutils literal notranslate"><span class="pre">INT.DCM.{V2|V2P}</span></code>, the interconnect tiles associated with <span class="xref std std-ref">digital clock managers</span></p></li>
<li><p><code class="docutils literal notranslate"><span class="pre">INT.CNR</span></code>, the interconnect tile associated with <a class="reference internal" href="corner.html#virtex2-corner"><span class="std std-ref">corner tiles</span></a></p></li>
<li><p><code class="docutils literal notranslate"><span class="pre">INT.PPC</span></code>, the interconnect tile associated with <span class="xref std std-ref">PowerPC cores</span> and multi-gigabit transceivers</p></li>
Expand Down
3 changes: 2 additions & 1 deletion xilinx/virtex2/intro.html
Original file line number Diff line number Diff line change
Expand Up @@ -59,6 +59,7 @@
<li class="toctree-l3"><a class="reference internal" href="clb.html">Configurable Logic Block</a></li>
<li class="toctree-l3"><a class="reference internal" href="bram.html">Block RAM β€” Virtex 2, Spartan 3</a></li>
<li class="toctree-l3"><a class="reference internal" href="clock.html">Clock interconnect</a></li>
<li class="toctree-l3"><a class="reference internal" href="io.html">Input / Output β€” Virtex 2, Spartan 3</a></li>
<li class="toctree-l3"><a class="reference internal" href="corner.html">Corners β€” Virtex 2, Spartan 3</a></li>
</ul>
</li>
Expand Down Expand Up @@ -117,7 +118,7 @@
<li><p>18Γ—18 multiplier blocks</p></li>
</ul>
</li>
<li><p>new <span class="xref std std-ref">input-output tiles</span>, with DDR register and DCI (digitally controlled impedance) support</p></li>
<li><p>new <a class="reference internal" href="io.html#virtex2-io"><span class="std std-ref">input-output tiles</span></a>, with DDR register and DCI (digitally controlled impedance) support</p></li>
<li><p>new <span class="xref std std-ref">digital clock managers</span>, a new version of the <span class="xref std std-ref">Virtex DLLs</span> with added frequency synthesis capability</p></li>
<li><p><a class="reference internal" href="corner.html#virtex2-corner"><span class="std std-ref">corner tiles</span></a>, with various global bits of logic:</p>
<ul>
Expand Down
Loading

0 comments on commit 51fa658

Please sign in to comment.