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chore: fix clippy and wasm error
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KimiWu123 committed Jan 28, 2024
1 parent 1cd2ac4 commit e308fc5
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Showing 4 changed files with 12 additions and 12 deletions.
1 change: 1 addition & 0 deletions circuit-benchmarks/src/super_circuit.rs
Original file line number Diff line number Diff line change
Expand Up @@ -89,6 +89,7 @@ mod tests {
max_bytecode: 512,
max_evm_rows: 0,
max_keccak_rows: 0,
max_vertical_circuit_rows: 0,
};
let (_, circuit, instance, _) =
SuperCircuit::build(block, circuits_params, Fr::from(0x100)).unwrap();
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1 change: 1 addition & 0 deletions integration-tests/tests/circuit_input_builder.rs
Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,7 @@ async fn test_circuit_input_builder_block(block_num: u64) {
max_evm_rows: 0,
max_exp_steps: 1000,
max_keccak_rows: 0,
max_vertical_circuit_rows: 0,
},
)
.await
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7 changes: 4 additions & 3 deletions zkevm-circuits/src/sig_circuit.rs
Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,10 @@ mod utils;
use crate::{
evm_circuit::{util::not, EvmCircuit},
keccak_circuit::KeccakCircuit,
sig_circuit::ecdsa::ecdsa_verify_no_pubkey_check,
sig_circuit::{
ecdsa::ecdsa_verify_no_pubkey_check,
utils::{calc_required_advices, FpChip},
},
table::{KeccakTable, SigTable},
util::{word::Word, Challenges, Expr, SubCircuit, SubCircuitConfig},
};
Expand All @@ -40,8 +43,6 @@ use halo2_ecc::{
FieldChip,
},
};

#[cfg(any(feature = "test", test, feature = "test-circuits"))]
pub(crate) use utils::*;

use halo2_proofs::{
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15 changes: 6 additions & 9 deletions zkevm-circuits/src/sig_circuit/test.rs
Original file line number Diff line number Diff line change
@@ -1,8 +1,5 @@
use super::*;
use eth_types::{
sign_types::{sign, SignData},
Field,
};
use eth_types::sign_types::{sign, SignData};
use halo2_proofs::{
arithmetic::Field as HaloField,
dev::MockProver,
Expand Down Expand Up @@ -130,7 +127,7 @@ fn test_edge_cases() {
log::debug!("signatures=");
log::debug!("{:#?}", signatures);

run::<Fr>(LOG_TOTAL_NUM_ROWS as u32, 8, signatures);
run(LOG_TOTAL_NUM_ROWS as u32, 8, signatures);
}

#[test]
Expand All @@ -152,7 +149,7 @@ fn sign_verify_zero_msg_hash() {
});

let k = LOG_TOTAL_NUM_ROWS as u32;
run::<Fr>(k, 1, signatures);
run(k, 1, signatures);

log::debug!("end of testing for msg_hash = 0");
}
Expand All @@ -176,7 +173,7 @@ fn sign_verify_nonzero_msg_hash() {
});

let k = LOG_TOTAL_NUM_ROWS as u32;
run::<Fr>(k, 1, signatures);
run(k, 1, signatures);

log::debug!("end of testing for msg_hash = 1");
}
Expand Down Expand Up @@ -209,7 +206,7 @@ fn sign_verify() {
}

let k = LOG_TOTAL_NUM_ROWS as u32;
run::<Fr>(k, *max_sig, signatures);
run(k, *max_sig, signatures);

log::debug!("end of testing for {} signatures", max_sig);
}
Expand Down Expand Up @@ -244,7 +241,7 @@ fn sign_with_rng(
sign(randomness, sk, msg_hash)
}

fn run<F: Field>(k: u32, max_verif: usize, signatures: Vec<SignData>) {
fn run(k: u32, max_verif: usize, signatures: Vec<SignData>) {
// SignVerifyChip -> ECDSAChip -> MainGate instance column
let circuit = SigCircuit::<Fr> {
max_verif,
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