This project is a implentaion of ETD32 ISA currently tageting v0.1.0 which is being created by Camden Dixie O’Brien
Is self described as: A little-endian, 32-bit RISC architecture, designed to be simple and relatively easy to implement. It is primarily intended for educational use, such as teaching processor internals and design, assembly language programming and compiler development.
An emulations of a ISA compliant CPU
A system for feeding the emulator with instutions and reading output.
A simple compiler from assembly to machine code.
Holds a couple of sample programs in both machine and assembly.
This project is going to be done in a TDD style as we have target specification to fit, and correctness is easy to test for this project.