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Enable Logical Operations Tokenization in CPU Plugin for ARM Architecture #28226

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Enable Logical Operations Tokenization in CPU Plugin for ARM Architecture #28226

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0ae09c5
Enable logical operations tokenization in CPU plugin
BhargavMah Dec 29, 2024
167dba9
Merge branch 'master' into add-logical-ops-tokenization
BhargavMah Dec 30, 2024
6ef38e3
Merge branch 'master' into add-logical-ops-tokenization
BhargavMah Dec 30, 2024
f6ca7f2
Update transformation_pipeline.cpp
BhargavMah Dec 30, 2024
fc8720c
Merge branch 'add-logical-ops-tokenization' of https://github.com/Bha…
BhargavMah Dec 30, 2024
1ec8fc4
Merge branch 'master' into add-logical-ops-tokenization
BhargavMah Dec 30, 2024
bf71c2b
Merge branch 'master' into add-logical-ops-tokenization
BhargavMah Dec 31, 2024
86c908b
Merge branch 'add-logical-ops-tokenization' of https://github.com/Bha…
BhargavMah Dec 31, 2024
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6 changes: 5 additions & 1 deletion src/plugins/intel_cpu/src/emitters/snippets/aarch64/cpu_generator.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -135,6 +135,9 @@ CPUTargetMachine::CPUTargetMachine(dnnl::impl::cpu::aarch64::cpu_isa_t host_isa)
jitters[op::v1::Mod::get_type_info_static()] = CREATE_CPU_EMITTER(jit_mod_emitter);
jitters[op::v1::Multiply::get_type_info_static()] = CREATE_CPU_EMITTER(jit_multiply_emitter);
jitters[op::v1::Subtract::get_type_info_static()] = CREATE_CPU_EMITTER(jit_subtract_emitter);
jitters[op::v1::LogicalAnd::get_type_info_static()] = CREATE_CPU_EMITTER(jit_logical_and_emitter);
jitters[op::v1::LogicalOr::get_type_info_static()] = CREATE_CPU_EMITTER(jit_logical_or_emitter);
jitters[op::v1::LogicalXor::get_type_info_static()] = CREATE_CPU_EMITTER(jit_logical_xor_emitter);

// unary
jitters[ov::op::v0::Abs::get_type_info_static()] = CREATE_CPU_EMITTER(jit_abs_emitter);
Expand All @@ -153,7 +156,8 @@ CPUTargetMachine::CPUTargetMachine(dnnl::impl::cpu::aarch64::cpu_isa_t host_isa)
jitters[ov::op::v0::Sigmoid::get_type_info_static()] = CREATE_CPU_EMITTER(jit_sigmoid_emitter);
jitters[ov::intel_cpu::SwishNode::get_type_info_static()] = CREATE_CPU_EMITTER(jit_swish_emitter);
jitters[ov::op::v0::Tanh::get_type_info_static()] = CREATE_CPU_EMITTER(jit_tanh_emitter);

jitters[op::v1::LogicalNot::get_type_info_static()] = CREATE_CPU_EMITTER(jit_logical_not_emitter);

// control flow
jitters[snippets::op::KernelStatic::get_type_info_static()] = CREATE_SNIPPETS_EMITTER(jit_kernel_static_emitter);
jitters[snippets::op::KernelDynamic::get_type_info_static()] = CREATE_SNIPPETS_EMITTER(jit_kernel_dynamic_emitter);
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4 changes: 3 additions & 1 deletion src/plugins/intel_cpu/src/transformations/transformation_pipeline.cpp
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Expand Up @@ -1130,7 +1130,9 @@ void Transformations::MainSnippets(void) {
ov::is_type<ov::op::v1::Mod>(n) || ov::is_type<ov::op::v1::Multiply>(n) ||
ov::is_type<ov::op::v0::Relu>(n) || ov::is_type<ov::op::v0::Sigmoid>(n) ||
ov::is_type<ov::op::v1::Subtract>(n) || ov::is_type<ov::op::v4::Swish>(n) ||
ov::is_type<ov::op::v0::Tanh>(n));
ov::is_type<ov::op::v0::Tanh>(n)|| ov::is_type<ov::op::v1::LogicalAnd>(n) ||
ov::is_type<ov::op::v1::LogicalOr>(n) || ov::is_type<ov::op::v1::LogicalXor>(n) ||
ov::is_type<ov::op::v1::LogicalNot>(n));
#else
// CPU Plugin support Swish in Subgraph via conversion to SwichCPU which assumes second input to be constant,
// and CPU Plugin does not support Mish for x64
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