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[CPU] Enable memory reuse for nested graphs (#27521)
### Details: - All the nested graphs are now must be a part of a global memory reuse logic - The core logic of the memory reuse is untouched (a bit refactored) - Instead of solving memory reuse for every graph / subgraph, now all the edges and global execution indices are collected from the "virtually flatten" graph first and then memory reuse is solved once for a model. - All the nodes with nested graphs are updated, including: 1. LoRa 2. Composite 3. If 4. TensorIterator 5. Convolution + Sum fallback subgraph ### Tickets: - *ticket-id*
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// Copyright (C) 2024 Intel Corporation | ||
// SPDX-License-Identifier: Apache-2.0 | ||
// | ||
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#pragma once | ||
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#include <memory> | ||
#include <unordered_map> | ||
#include <vector> | ||
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namespace ov { | ||
namespace intel_cpu { | ||
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class Node; | ||
class Edge; | ||
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using GlobalExecutionIndex = std::unordered_map<std::shared_ptr<Node>, std::pair<int, int>>; | ||
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struct AllocationContext { | ||
std::vector<std::shared_ptr<Edge>> edges; | ||
GlobalExecutionIndex execIndex; | ||
std::vector<size_t> syncPoints; | ||
}; | ||
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} // namespace intel_cpu | ||
} // namespace ov |
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