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Set the environment configuration only from env_cfg constraints. (#2408)
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@AEzzejjari
AEzzejjari authored Aug 29, 2024
1 parent 776e013 commit 668829d
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Showing 6 changed files with 11 additions and 53 deletions.
2 changes: 1 addition & 1 deletion verif/env/uvme/cov/uvme_cva6_config_covg.sv
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Expand Up @@ -214,7 +214,7 @@ endfunction : build_phase

function void uvme_cva6_config_covg_c::sample_cva6_config();

config_cg.sample(cfg.CVA6Cfg);
config_cg.sample(RTLCVA6Cfg);
boot_addr_cg.sample(cfg);
clock_period_cg.sample(cfg.sys_clk_period);

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45 changes: 6 additions & 39 deletions verif/env/uvme/uvme_cva6_cfg.sv
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Expand Up @@ -59,9 +59,6 @@ class uvme_cva6_cfg_c extends uvma_core_cntrl_cfg_c;
// MMU support
rand bit MmuPresent;

// Handle to RTL configuration
rand cva6_cfg_t CVA6Cfg;

`uvm_object_utils_begin(uvme_cva6_cfg_c)
`uvm_field_int ( enabled , UVM_DEFAULT )
`uvm_field_enum(uvm_active_passive_enum, is_active , UVM_DEFAULT )
Expand Down Expand Up @@ -99,40 +96,12 @@ class uvme_cva6_cfg_c extends uvma_core_cntrl_cfg_c;
}

constraint cva6_riscv_cons {
xlen == CVA6Cfg.XLEN;
ilen == 32;
ext_i_supported == 1;
ext_a_supported == CVA6Cfg.RVA;
ext_m_supported == 1;
ext_c_supported == CVA6Cfg.RVC;
ext_p_supported == 0;
ext_v_supported == CVA6Cfg.RVV;
ext_f_supported == CVA6Cfg.RVF;
ext_d_supported == CVA6Cfg.RVD;
ext_zba_supported == CVA6Cfg.RVB;
ext_zbb_supported == CVA6Cfg.RVB;
ext_zbc_supported == CVA6Cfg.RVB;
ext_zbe_supported == 0;
ext_zbf_supported == 0;
ext_zbm_supported == 0;
ext_zbp_supported == 0;
ext_zbr_supported == 0;
ext_zbs_supported == CVA6Cfg.RVB;
ext_zbt_supported == 0;
ext_zifencei_supported == 1;
ext_zicsr_supported == 1;
ext_zicond_supported == CVA6Cfg.RVZiCond;
ext_zcb_supported == CVA6Cfg.RVZCB;
ext_zihpm_supported == 0;
ext_zicntr_supported == 0;
xlen == RTLCVA6Cfg.XLEN;

mode_s_supported == CVA6Cfg.RVS;
mode_u_supported == CVA6Cfg.RVU;
mode_h_supported == CVA6Cfg.RVH;
ext_zihpm_supported == 0;
ext_zicond_supported == RTLCVA6Cfg.RVZiCond;

pmp_supported == (CVA6Cfg.NrPMPEntries > 0);
nr_pmp_entries == 64;
debug_supported == CVA6Cfg.DebugEn;

unaligned_access_supported == 0;
unaligned_access_amo_supported == 0;
Expand All @@ -146,11 +115,9 @@ class uvme_cva6_cfg_c extends uvma_core_cntrl_cfg_c;
dm_halt_addr_valid == 1;
dm_exception_addr_valid == 1;
nmi_addr_valid == 1;
HPDCache_supported == 1;
HPDCache_supported == (RTLCVA6Cfg.DCacheType == 2);

DirectVecOnly == CVA6Cfg.DirectVecOnly;
TvalEn == CVA6Cfg.TvalEn;
MmuPresent == CVA6Cfg.MmuPresent;
MmuPresent == RTLCVA6Cfg.MmuPresent;
}

constraint ext_const {
Expand Down Expand Up @@ -200,7 +167,7 @@ class uvme_cva6_cfg_c extends uvma_core_cntrl_cfg_c;
isacov_cfg.seq_instr_x2_enabled == 1;
isacov_cfg.reg_crosses_enabled == 0;
isacov_cfg.reg_hazards_enabled == 1;
rvfi_cfg.nret == CVA6Cfg.NrCommitPorts;
rvfi_cfg.nret == RTLCVA6Cfg.NrCommitPorts;
unified_traps == 0;
axi_cfg.rand_channel_delay_enabled == 0;

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8 changes: 0 additions & 8 deletions verif/env/uvme/uvme_cva6_env.sv
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Expand Up @@ -166,14 +166,6 @@ function void uvme_cva6_env_c::build_phase(uvm_phase phase);
`uvm_info("CFG", $sformatf("Found configuration handle:\n%s", cfg.sprint()), UVM_DEBUG)
end

void'(uvm_config_db#(cva6_cfg_t)::get(this, "", "CVA6Cfg", cfg.CVA6Cfg));
if (!cfg.CVA6Cfg) begin
`uvm_fatal("CVA6Cfg", "RTL Configuration handle is null")
end
else begin
`uvm_info("CVA6Cfg", $sformatf("Found RTL configuration handle:\n%p", cfg.CVA6Cfg), UVM_DEBUG)
end

cfg.rvfi_cfg.nret = cfg.CVA6Cfg.NrCommitPorts;

if (cfg.enabled) begin
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2 changes: 2 additions & 0 deletions verif/env/uvme/uvme_cva6_pkg.sv
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Expand Up @@ -75,6 +75,8 @@ package uvme_cva6_pkg;
bit [6:0] legal_i_funct7[$] = '{7'b0000000,
7'b0100000};

parameter config_pkg::cva6_cfg_t RTLCVA6Cfg = build_config_pkg::build_config(cva6_config_pkg::cva6_cfg);

// Constants / Structs / Enums
`include "uvme_cva6_constants.sv"
`include "uvme_cva6_tdefs.sv"
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4 changes: 2 additions & 2 deletions verif/tb/core/uvma_cva6pkg_utils.sv
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Expand Up @@ -19,14 +19,14 @@ function st_core_cntrl_cfg cva6pkg_to_core_cntrl_cfg(st_core_cntrl_cfg cfg);
cfg.ext_a_supported = CVA6Cfg.RVA;
cfg.ext_m_supported = 1;
cfg.ext_c_supported = CVA6Cfg.RVC;
cfg.ext_p_supported = 1;
cfg.ext_p_supported = 0;
cfg.ext_v_supported = CVA6Cfg.RVV;
cfg.ext_f_supported = CVA6Cfg.RVF;
cfg.ext_d_supported = CVA6Cfg.RVD;
cfg.ext_zba_supported = CVA6Cfg.RVB;
cfg.ext_zbb_supported = CVA6Cfg.RVB;
cfg.ext_zbc_supported = CVA6Cfg.RVB;
cfg.ext_zbe_supported = CVA6Cfg.RVB;
cfg.ext_zbe_supported = 0;
cfg.ext_zbf_supported = 0;
cfg.ext_zbm_supported = 0;
cfg.ext_zbp_supported = 0;
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3 changes: 0 additions & 3 deletions verif/tb/uvmt/uvmt_cva6_tb.sv
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Expand Up @@ -378,9 +378,6 @@ module uvmt_cva6_tb;
uvm_config_db#(int)::set(.cntxt(null), .inst_name("*"), .field_name("ENV_PARAM_INSTR_DATA_WIDTH"), .value(ENV_PARAM_INSTR_DATA_WIDTH) );
uvm_config_db#(int)::set(.cntxt(null), .inst_name("*"), .field_name("ENV_PARAM_RAM_ADDR_WIDTH"), .value(ENV_PARAM_RAM_ADDR_WIDTH) );

// Set RTL parameters
uvm_config_db#(config_pkg::cva6_cfg_t)::set(.cntxt(null), .inst_name("*.env"), .field_name("CVA6Cfg"), .value(CVA6Cfg) );

// Run test
uvm_top.enable_print_topology = 0; // ENV coders enable this as a debug aid
uvm_top.finish_on_completion = 1;
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