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[RISCV] Add CORE-V headers
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Add header files for all CORE-V extensions that have C builtin functions.
The definitions of existing builtin functions are also adjusted accordingly.
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melonedo authored and PaoloS02 committed Oct 27, 2023
1 parent bd8f80c commit f152674
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Showing 10 changed files with 427 additions and 64 deletions.
78 changes: 39 additions & 39 deletions clang/include/clang/Basic/BuiltinsRISCVCOREV.def
Original file line number Diff line number Diff line change
Expand Up @@ -34,36 +34,36 @@ TARGET_BUILTIN(simd_avg_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_avg_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_avgu_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_avgu_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_avgu_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_avgu_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_avgu_sc_h, "UZiUZiUs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_avgu_sc_b, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_min_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_min_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_min_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_min_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_minu_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_minu_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_minu_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_minu_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_minu_sc_h, "UZiUZiUs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_minu_sc_b, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_max_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_max_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_max_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_max_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_maxu_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_maxu_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_maxu_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_maxu_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_maxu_sc_h, "UZiUZiUs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_maxu_sc_b, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_srl_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_srl_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_srl_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_srl_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_srl_sc_h, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_srl_sc_b, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sra_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sra_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sra_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sra_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sra_sc_h, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sra_sc_b, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sll_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sll_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sll_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sll_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sll_sc_h, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sll_sc_b, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_or_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_or_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_or_sc_h, "UZiUZiSs", "nc", "xcvsimd")
Expand All @@ -84,26 +84,26 @@ TARGET_BUILTIN(simd_dotup_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotup_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotup_sc_h, "UZiUZiUs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotup_sc_b, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotusp_h, "ZiUZiSZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotusp_b, "ZiUZiSZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotusp_h, "ZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotusp_b, "ZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotusp_sc_h, "ZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotusp_sc_b, "ZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotsp_h, "ZiSZiSZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotsp_b, "ZiSZiSZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotsp_sc_h, "ZiSZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotsp_sc_b, "ZiSZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotsp_h, "ZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotsp_b, "ZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotsp_sc_h, "ZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotsp_sc_b, "ZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotup_h, "UZiUZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotup_b, "UZiUZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotup_sc_h, "UZiUZiUsUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotup_sc_b, "UZiUZiUcUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotusp_h, "ZiUZiSZiZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotusp_b, "ZiUZiSZiZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotusp_h, "ZiUZiUZiZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotusp_b, "ZiUZiUZiZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotusp_sc_h, "ZiUZiSsZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotusp_sc_b, "ZiUZiScZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotsp_h, "ZiSZiSZiZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotsp_b, "ZiSZiSZiZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotsp_sc_h, "ZiSZiSsZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotsp_sc_b, "ZiSZiScZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotsp_h, "ZiUZiUZiZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotsp_b, "ZiUZiUZiZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotsp_sc_h, "ZiUZiSsZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotsp_sc_b, "ZiUZiScZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_extract_h, "ZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_extract_b, "ZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_extractu_h, "UZiUZiUc", "nc", "xcvsimd")
Expand All @@ -112,8 +112,8 @@ TARGET_BUILTIN(simd_insert_h, "UZiUZiUZiIUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_insert_b, "UZiUZiUZiIUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_shuffle_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_shuffle_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_shuffle_sci_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_shuffle_sci_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_shuffle_sci_h, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_shuffle_sci_b, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_shuffle2_h, "UZiUZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_shuffle2_b, "UZiUZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_packhi_h, "UZiUZiUZi", "nc", "xcvsimd")
Expand Down Expand Up @@ -146,34 +146,34 @@ TARGET_BUILTIN(simd_cmple_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmple_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgtu_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgtu_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgtu_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgtu_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgtu_sc_h, "UZiUZiUs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgtu_sc_b, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgeu_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgeu_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgeu_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgeu_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgeu_sc_h, "UZiUZiUs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgeu_sc_b, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpltu_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpltu_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpltu_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpltu_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpltu_sc_h, "UZiUZiUs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpltu_sc_b, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpleu_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpleu_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpleu_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpleu_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpleu_sc_h, "UZiUZiUs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpleu_sc_b, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cplxmul_r, "UZiUZiUZiUZiIUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cplxmul_i, "UZiUZiUZiUZiIUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cplxconj, "UZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_subrotmj, "UZiUZiUZiIUc", "nc", "xcvsimd")

TARGET_BUILTIN(bitmanip_extract, "UZiUZiUs", "nc", "xcvbitmanip")
TARGET_BUILTIN(bitmanip_extract, "ZiZiUs", "nc", "xcvbitmanip")
TARGET_BUILTIN(bitmanip_extractu, "UZiUZiUs", "nc", "xcvbitmanip")
TARGET_BUILTIN(bitmanip_insert, "UZiUZiUsUZi", "nc", "xcvbitmanip")
TARGET_BUILTIN(bitmanip_bclr, "UZiUZiUs", "nc", "xcvbitmanip")
TARGET_BUILTIN(bitmanip_bset, "UZiUZiUs", "nc", "xcvbitmanip")
TARGET_BUILTIN(bitmanip_ff1, "UZiUZi", "nc", "xcvbitmanip")
TARGET_BUILTIN(bitmanip_fl1, "UZiUZi", "nc", "xcvbitmanip")
TARGET_BUILTIN(bitmanip_clb, "UZiUZi", "nc", "xcvbitmanip")
TARGET_BUILTIN(bitmanip_cnt, "UZiUZi", "nc", "xcvbitmanip")
TARGET_BUILTIN(bitmanip_ff1, "UZcUZi", "nc", "xcvbitmanip")
TARGET_BUILTIN(bitmanip_fl1, "UZcUZi", "nc", "xcvbitmanip")
TARGET_BUILTIN(bitmanip_clb, "UZcUZi", "nc", "xcvbitmanip")
TARGET_BUILTIN(bitmanip_cnt, "UZcUZi", "nc", "xcvbitmanip")
TARGET_BUILTIN(bitmanip_ror, "UZiUZiUZi", "nc", "xcvbitmanip")
TARGET_BUILTIN(bitmanip_bitrev, "UZiUZiIUcIUc", "nc", "xcvbitmanip")

Expand Down
17 changes: 16 additions & 1 deletion clang/lib/Headers/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -92,6 +92,14 @@ set(ppc_htm_files
htmxlintrin.h
)

set(riscv_files
riscv_corev_alu.h
riscv_corev_bitmanip.h
riscv_corev_elw.h
riscv_corev_mac.h
riscv_corev_simd.h
)

set(systemz_files
s390intrin.h
vecintrin.h
Expand Down Expand Up @@ -232,6 +240,7 @@ set(files
${opencl_files}
${ppc_files}
${ppc_htm_files}
${riscv_files}
${systemz_files}
${ve_files}
${x86_files}
Expand Down Expand Up @@ -415,7 +424,7 @@ add_header_target("hip-resource-headers" "${hip_files}")
add_header_target("mips-resource-headers" "${mips_msa_files}")
add_header_target("ppc-resource-headers" "${ppc_files};${ppc_wrapper_files}")
add_header_target("ppc-htm-resource-headers" "${ppc_htm_files}")
add_header_target("riscv-resource-headers" "${riscv_generated_files}")
add_header_target("riscv-resource-headers" "${riscv_generated_files};${riscv_files}")
add_header_target("systemz-resource-headers" "${systemz_files}")
add_header_target("ve-resource-headers" "${ve_files}")
add_header_target("webassembly-resource-headers" "${webassembly_files}")
Expand Down Expand Up @@ -532,6 +541,12 @@ install(
EXCLUDE_FROM_ALL
COMPONENT riscv-resource-headers)

install(
FILES ${riscv_files}
DESTINATION ${header_install_dir}
EXCLUDE_FROM_ALL
COMPONENT riscv-resource-headers)

install(
FILES ${systemz_files}
DESTINATION ${header_install_dir}
Expand Down
47 changes: 47 additions & 0 deletions clang/lib/Headers/riscv_corev_alu.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,47 @@
/*===---- riscv_corev_alu.h - CORE-V ALU intrinsics ------------------------===
*
* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
* See https://llvm.org/LICENSE.txt for license information.
* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
*
*===-----------------------------------------------------------------------===
*/

#ifndef __RISCV_COREV_ALU_H
#define __RISCV_COREV_ALU_H

#include <stdint.h>

#if defined(__cplusplus)
extern "C" {
#endif

#if defined(__riscv_xcvalu)
int __builtin_abs (int j);
int __builtin_riscv_cv_alu_slet (int32_t i, int32_t j);
int __builtin_riscv_cv_alu_sletu (uint32_t i, uint32_t j);
int32_t __builtin_riscv_cv_alu_min (int32_t i, int32_t j);
uint32_t __builtin_riscv_cv_alu_minu (uint32_t i, uint32_t j);
int32_t __builtin_riscv_cv_alu_max (int32_t i, int32_t j);
uint32_t __builtin_riscv_cv_alu_maxu (uint32_t i, uint32_t j);
int32_t __builtin_riscv_cv_alu_exths (int16_t i);
uint32_t __builtin_riscv_cv_alu_exthz (uint16_t i);
int32_t __builtin_riscv_cv_alu_extbs (int8_t i);
uint32_t __builtin_riscv_cv_alu_extbz (uint8_t);
int32_t __builtin_riscv_cv_alu_clip (int32_t i, uint32_t j);
uint32_t __builtin_riscv_cv_alu_clipu (uint32_t i, uint32_t j);
int32_t __builtin_riscv_cv_alu_addN (int32_t x, int32_t y, uint8_t shft);
uint32_t __builtin_riscv_cv_alu_adduN (uint32_t x, uint32_t y, uint8_t shft);
int32_t __builtin_riscv_cv_alu_addRN (int32_t x, int32_t y, uint8_t shft);
uint32_t __builtin_riscv_cv_alu_adduRN (uint32_t x, uint32_t y, uint8_t shft);
int32_t __builtin_riscv_cv_alu_subN (int32_t x, int32_t y, uint8_t shft);
uint32_t __builtin_riscv_cv_alu_subuN (uint32_t x, uint32_t y, uint8_t shft);
int32_t __builtin_riscv_cv_alu_subRN (int32_t x, int32_t y, uint8_t shft);
uint32_t __builtin_riscv_cv_alu_subuRN (uint32_t x, uint32_t y, uint8_t shft);
#endif // defined(__riscv_xcvalu)

#if defined(__cplusplus)
}
#endif

#endif // define __RISCV_COREV_ALU_H
37 changes: 37 additions & 0 deletions clang/lib/Headers/riscv_corev_bitmanip.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,37 @@
/*===---- riscv_corev_bitmanip.h - CORE-V bit manipulation intrinsics ------===
*
* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
* See https://llvm.org/LICENSE.txt for license information.
* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
*
*===-----------------------------------------------------------------------===
*/

#ifndef __RISCV_COREV_BITMANIP_H
#define __RISCV_COREV_BITMANIP_H

#include <stdint.h>

#if defined(__cplusplus)
extern "C" {
#endif

#if defined(__riscv_xcvbitmanip)
int32_t __builtin_riscv_cv_bitmanip_extract (int32_t i, uint16_t range);
uint32_t __builtin_riscv_cv_bitmanip_extractu (uint32_t i, uint16_t range);
uint32_t __builtin_riscv_cv_bitmanip_insert (uint32_t i, uint16_t range, uint32_t k);
uint32_t __builtin_riscv_cv_bitmanip_bclr (uint32_t i, uint16_t range);
uint32_t __builtin_riscv_cv_bitmanip_bset (uint32_t i, uint16_t range);
uint8_t __builtin_riscv_cv_bitmanip_ff1 (uint32_t i);
uint8_t __builtin_riscv_cv_bitmanip_fl1 (uint32_t i);
uint8_t __builtin_riscv_cv_bitmanip_clb (uint32_t i);
uint8_t __builtin_riscv_cv_bitmanip_cnt (uint32_t i);
uint32_t __builtin_riscv_cv_bitmanip_ror (uint32_t i, uint32_t j);
uint32_t __builtin_riscv_cv_bitmanip_bitrev (uint32_t i, uint8_t pts, uint8_t radix);
#endif // defined(__riscv_xcvbitmanip)

#if defined(__cplusplus)
}
#endif

#endif // define __RISCV_COREV_BITMANIP_H
27 changes: 27 additions & 0 deletions clang/lib/Headers/riscv_corev_elw.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,27 @@
/*===---- riscv_corev_elw.h - CORE-V event load intrinsics -----------------===
*
* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
* See https://llvm.org/LICENSE.txt for license information.
* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
*
*===-----------------------------------------------------------------------===
*/

#ifndef __RISCV_COREV_ELW_H
#define __RISCV_COREV_ELW_H

#include <stdint.h>

#if defined(__cplusplus)
extern "C" {
#endif

#if defined(__riscv_xcvelw)
uint32_t __builtin_riscv_cv_elw_elw (void *loc);
#endif // defined(__riscv_xcvelw)

#if defined(__cplusplus)
}
#endif

#endif // define __RISCV_COREV_ELW_H
44 changes: 44 additions & 0 deletions clang/lib/Headers/riscv_corev_mac.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,44 @@
/*===---- riscv_corev_mac.h - CORE-V multiply accumulate intrinsics --------===
*
* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
* See https://llvm.org/LICENSE.txt for license information.
* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
*
*===-----------------------------------------------------------------------===
*/

#ifndef __RISCV_COREV_MAC_H
#define __RISCV_COREV_MAC_H

#include <stdint.h>

#if defined(__cplusplus)
extern "C" {
#endif

#if defined(__riscv_xcvmac)
int32_t __builtin_riscv_cv_mac_mac (int32_t x, int32_t y, int32_t z);
int32_t __builtin_riscv_cv_mac_msu (int32_t x, int32_t y, int32_t z);
uint32_t __builtin_riscv_cv_mac_muluN (uint32_t x, uint32_t y, const uint8_t shft);
uint32_t __builtin_riscv_cv_mac_mulhhuN (uint32_t x, uint32_t y, const uint8_t shft);
int32_t __builtin_riscv_cv_mac_mulsN (uint32_t x, uint32_t y, const uint8_t shft);
int32_t __builtin_riscv_cv_mac_mulhhsN (uint32_t x, uint32_t y, const uint8_t shft);
uint32_t __builtin_riscv_cv_mac_muluRN (uint32_t x, uint32_t y, const uint8_t shft);
uint32_t __builtin_riscv_cv_mac_mulhhuRN (uint32_t x, uint32_t y, const uint8_t shft);
int32_t __builtin_riscv_cv_mac_mulsRN (uint32_t x, uint32_t y, const uint8_t shft);
int32_t __builtin_riscv_cv_mac_mulhhsRN (uint32_t x, uint32_t y, const uint8_t shft);
uint32_t __builtin_riscv_cv_mac_macuN (uint32_t x, uint32_t y, uint32_t z, const uint8_t shft);
uint32_t __builtin_riscv_cv_mac_machhuN (uint32_t x, uint32_t y, uint32_t z, const uint8_t shft);
int32_t __builtin_riscv_cv_mac_macsN (uint32_t x, uint32_t y, int32_t z, const uint8_t shft);
int32_t __builtin_riscv_cv_mac_machhsN (uint32_t x, uint32_t y, int32_t z, const uint8_t shft);
uint32_t __builtin_riscv_cv_mac_macuRN (uint32_t x, uint32_t y, uint32_t z, const uint8_t shft);
uint32_t __builtin_riscv_cv_mac_machhuRN (uint32_t x, uint32_t y, uint32_t z, const uint8_t shft);
int32_t __builtin_riscv_cv_mac_macsRN (uint32_t x, uint32_t y, int32_t z, const uint8_t shft);
int32_t __builtin_riscv_cv_mac_machhsRN (uint32_t x, uint32_t y, int32_t z, const uint8_t shft);
#endif // defined(__riscv_xcvmac)

#if defined(__cplusplus)
}
#endif

#endif // define __RISCV_COREV_MAC_H
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