o1vm/riscv32i: some more instructions

o1-labs · Nov 4, 2024 · 51f1a5f · 51f1a5f
1 parent 046a89a
commit 51f1a5f
Showing 1 changed file with 6 additions and 0 deletions.
diff --git a/o1vm/src/interpreters/riscv32i/interpreter.rs b/o1vm/src/interpreters/riscv32i/interpreter.rs
@@ -33,4 +33,10 @@ pub enum Instruction {
     // tail offset -
     // auipc x1, offset[31 : 12] + offset[11]
     Tail,
+
+    AddImmediate, // addi
+    StoreWord,    // sw
+    LoadWord,     // lw
+    Multiply,     // mul
+    Move,         // mv
 }