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soc: nordic: nrf54l: soc: Rework to remove noup commits. #2510

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3 changes: 0 additions & 3 deletions boards/nordic/nrf54l09pdk/Kconfig.defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -9,9 +9,6 @@ config BT_CTLR
config ROM_START_OFFSET
default 0x800 if BOOTLOADER_MCUBOOT

config SOC_NRF54LX_SKIP_CLOCK_CONFIG
default y

config SOC_NRF54LX_SKIP_GLITCHDETECTOR_DISABLE
default y

Expand Down
5 changes: 5 additions & 0 deletions boards/nordic/nrf54l09pdk/nrf54l09_cpuapp_common.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,11 @@
status = "okay";
};

&hfpll {
/* For now use 64 MHz clock for CPU and fast peripherals. */
clock-frequency = <DT_FREQ_M(64)>;
};

&lfxo {
load-capacitors = "internal";
load-capacitance-femtofarad = <15500>;
Expand Down
3 changes: 0 additions & 3 deletions boards/nordic/nrf54l20pdk/Kconfig.defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -6,9 +6,6 @@ if BOARD_NRF54L20PDK_NRF54L20_CPUAPP
config ROM_START_OFFSET
default 0x800 if BOOTLOADER_MCUBOOT

config SOC_NRF54LX_SKIP_CLOCK_CONFIG
default y

config SOC_NRF54LX_SKIP_GLITCHDETECTOR_DISABLE
default y

Expand Down
5 changes: 5 additions & 0 deletions boards/nordic/nrf54l20pdk/nrf54l20_cpuapp_common.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,11 @@
status = "okay";
};

&hfpll {
/* For now use 64 MHz clock for CPU and fast peripherals. */
clock-frequency = <DT_FREQ_M(64)>;
};

&lfxo {
load-capacitors = "internal";
load-capacitance-femtofarad = <15500>;
Expand Down
1 change: 1 addition & 0 deletions drivers/counter/counter_nrfx_timer.c
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,7 @@
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <soc.h>
#include <zephyr/drivers/counter.h>
#include <zephyr/drivers/clock_control/nrf_clock_control.h>
#include <zephyr/devicetree.h>
Expand Down
2 changes: 1 addition & 1 deletion dts/common/nordic/nrf54l09.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@
compatible = "arm,cortex-m33f";
reg = <0>;
device_type = "cpu";
clock-frequency = <DT_FREQ_M(64)>;
clocks = <&hfpll>;
#address-cells = <1>;
#size-cells = <1>;
itm: itm@e0000000 {
Expand Down
2 changes: 1 addition & 1 deletion dts/common/nordic/nrf54l20.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,7 @@
compatible = "arm,cortex-m33f";
reg = <0>;
device_type = "cpu";
clock-frequency = <DT_FREQ_M(128)>;
clocks = <&hfpll>;
#address-cells = <1>;
#size-cells = <1>;
itm: itm@e0000000 {
Expand Down
4 changes: 2 additions & 2 deletions dts/common/nordic/nrf54l_05_10_15.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@
compatible = "arm,cortex-m33f";
reg = <0>;
device_type = "cpu";
clock-frequency = <DT_FREQ_M(128)>;
clocks = <&hfpll>;
#address-cells = <1>;
#size-cells = <1>;
itm: itm@e0000000 {
Expand All @@ -41,7 +41,7 @@
compatible = "nordic,vpr";
reg = <1>;
device_type = "cpu";
clock-frequency = <DT_FREQ_M(128)>;
clocks = <&hfpll>;
riscv,isa = "rv32emc";
nordic,bus-width = <32>;
};
Expand Down
19 changes: 0 additions & 19 deletions include/zephyr/drivers/clock_control/nrf_clock_control.h
Original file line number Diff line number Diff line change
Expand Up @@ -343,25 +343,6 @@ void nrf_clock_control_hfxo_release(void);

#endif /* defined(CONFIG_CLOCK_CONTROL_NRF2) */

/** @brief Get clock frequency that is used for the given node.
*
* Macro checks if node has clock property and if yes then if clock has clock_frequency property
* then it is returned. If it has supported_clock_frequency property with the list of supported
* frequencies then the last one is returned with assumption that they are ordered and the last
* one is the highest. If node does not have clock then 16 MHz is returned which is the default
* frequency.
*
* @param node Devicetree node.
*
* @return Frequency of the clock that is used for the node.
*/
#define NRF_PERIPH_GET_FREQUENCY(node) \
COND_CODE_1(DT_CLOCKS_HAS_IDX(node, 0), \
(COND_CODE_1(DT_NODE_HAS_PROP(DT_CLOCKS_CTLR(node), clock_frequency), \
(DT_PROP(DT_CLOCKS_CTLR(node), clock_frequency)), \
(DT_PROP_LAST(DT_CLOCKS_CTLR(node), supported_clock_frequency)))), \
(NRFX_MHZ_TO_HZ(16)))

#ifdef __cplusplus
}
#endif
Expand Down
5 changes: 4 additions & 1 deletion modules/hal_nordic/nrfx/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -183,7 +183,10 @@ if(DEFINED uicr_path)
endif()

if(CONFIG_SOC_NRF54L_CPUAPP_COMMON)
dt_prop(clock_frequency PATH "/cpus/cpu@0" PROPERTY "clock-frequency")
# Ideally, hfpll should taken as a phandle from clocks property from cpu but it
# seems that there is no such option in DT cmake functions. Assuming that nrf54l
# is using hfpll as CPU clock source (true for all existing devices).
dt_prop(clock_frequency PATH "/clocks/hfpll" PROPERTY "clock-frequency")
math(EXPR clock_frequency_mhz "${clock_frequency} / 1000000")
zephyr_compile_definitions("NRF_CONFIG_CPU_FREQ_MHZ=${clock_frequency_mhz}")
endif()
Expand Down
2 changes: 1 addition & 1 deletion samples/bluetooth/bap_unicast_client/src/stream_tx.c
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/

#include <zephyr/autoconf.h>
#include <autoconf.h>
#include <errno.h>
#include <stdbool.h>
#include <stddef.h>
Expand Down
2 changes: 1 addition & 1 deletion samples/bluetooth/cap_acceptor/src/cap_acceptor_unicast.c
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@
* SPDX-License-Identifier: Apache-2.0
*/

#include <zephyr/autoconf.h>
#include <autoconf.h>
#include <errno.h>
#include <stdbool.h>
#include <stddef.h>
Expand Down
2 changes: 1 addition & 1 deletion samples/bluetooth/cap_acceptor/src/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/

#include <zephyr/autoconf.h>
#include <autoconf.h>
#include <errno.h>
#include <stdbool.h>
#include <stddef.h>
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/

#include <zephyr/autoconf.h>
#include <autoconf.h>
#include <stdbool.h>
#include <stddef.h>
#include <stdint.h>
Expand Down
2 changes: 1 addition & 1 deletion samples/bluetooth/cap_initiator/src/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/

#include <zephyr/autoconf.h>
#include <autoconf.h>
#include <stddef.h>

#include <zephyr/bluetooth/bluetooth.h>
Expand Down
19 changes: 19 additions & 0 deletions soc/nordic/common/soc_nrf_common.h
Original file line number Diff line number Diff line change
Expand Up @@ -236,6 +236,25 @@
DT_PINCTRL_HAS_NAME(node_id, sleep), \
DT_NODE_PATH(node_id) " defined without sleep state")

/** @brief Get clock frequency that is used for the given node.
*
* Macro checks if node has clock property and if yes then if clock has clock_frequency property
* then it is returned. If it has supported_clock_frequency property with the list of supported
* frequencies then the last one is returned with assumption that they are ordered and the last
* one is the highest. If node does not have clock then 16 MHz is returned which is the default
* frequency.
*
* @param node Devicetree node.
*
* @return Frequency of the clock that is used for the node.
*/
#define NRF_PERIPH_GET_FREQUENCY(node) \
COND_CODE_1(DT_CLOCKS_HAS_IDX(node, 0), \
(COND_CODE_1(DT_NODE_HAS_PROP(DT_CLOCKS_CTLR(node), clock_frequency), \
(DT_PROP(DT_CLOCKS_CTLR(node), clock_frequency)), \
(DT_PROP_LAST(DT_CLOCKS_CTLR(node), supported_clock_frequency)))), \
(NRFX_MHZ_TO_HZ(16)))

#endif /* !_ASMLANGUAGE */

#endif
85 changes: 28 additions & 57 deletions soc/nordic/nrf54l/soc.c
Original file line number Diff line number Diff line change
Expand Up @@ -12,52 +12,42 @@
* for the Nordic Semiconductor nRF54L family processor.
*/

#ifdef __NRF_TFM__
/* Include autoconf for cases when this file is used in special build (e.g. TFM) */
#include <zephyr/autoconf.h>
#endif

#include <zephyr/devicetree.h>
#include <zephyr/dt-bindings/regulator/nrf5x.h>
#include <zephyr/kernel.h>
#include <zephyr/devicetree.h>
#include <zephyr/init.h>
#include <zephyr/logging/log.h>

#ifndef __NRF_TFM__
#include <zephyr/cache.h>
#endif
#include <soc/nrfx_coredep.h>
#include <system_nrf54l.h>
#include <soc.h>
LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);

#include <zephyr/dt-bindings/regulator/nrf5x.h>
#if (defined(NRF_APPLICATION) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)) || \
!defined(__ZEPHYR__)

#if defined(NRF_APPLICATION)
#include <cmsis_core.h>
#include <nrf_erratas.h>
#include <hal/nrf_glitchdet.h>
#include <hal/nrf_oscillators.h>
#include <hal/nrf_power.h>
#include <hal/nrf_regulators.h>
#endif
#include <soc/nrfx_coredep.h>

#include <nrf_erratas.h>
#include <system_nrf54l.h>

LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
#include <zephyr/dt-bindings/regulator/nrf5x.h>

#if defined(NRF_APPLICATION)
#define LFXO_NODE DT_NODELABEL(lfxo)
#define HFXO_NODE DT_NODELABEL(hfxo)
#endif

/* Building for cpuflpr with ns uses cpu_1 instead of cpu_0 */
#if DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency)
#define DEVICE_DT_CLOCK_FREQ DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency)
#elif DT_PROP(DT_PATH(cpus, cpu_1), clock_frequency)
#define DEVICE_DT_CLOCK_FREQ DT_PROP(DT_PATH(cpus, cpu_1), clock_frequency)
#endif

#if defined(NRF_APPLICATION)
static inline void power_and_clock_configuration(void)
{
/* NRF_REGULATORS and NRF_OSCILLATORS are configured to be secure
* as NRF_REGULATORS.POFCON is needed by the secure image to
* prevent glitches when the power supply is attacked.
*
* NRF_OSCILLATORS is also configured as secure because of a HW limitation
* that requires them to be configured with the same security property.
*/
#if DT_ENUM_HAS_VALUE(LFXO_NODE, load_capacitors, internal)
uint32_t xosc32ktrim = NRF_FICR->XOSC32KTRIM;

Expand All @@ -84,16 +74,16 @@ static inline void power_and_clock_configuration(void)
* NOTE: The desired capacitance value is used in encoded from in INTCAP calculation formula
* That is different than in case of HFXO.
*/
uint32_t cap_val_encoded =
(((DT_PROP(LFXO_NODE, load_capacitance_femtofarad) - 4000UL) * 2UL) / 1000UL);
uint32_t cap_val_encoded = (((DT_PROP(LFXO_NODE, load_capacitance_femtofarad) - 4000UL)
* 2UL) / 1000UL);

/* Calculation of INTCAP code before rounding. Min that calculations here are done on
* values multiplied by 2^9, e.g. 0.765625 * 2^9 = 392.
* offset_k should be divided by 2^6, but to add it to value shifted by 2^9 we have to
* multiply it be 2^3.
*/
uint32_t mid_val =
(cap_val_encoded - 4UL) * (uint32_t)(slope_k + 392UL) + (offset_k << 3UL);
uint32_t mid_val = (cap_val_encoded - 4UL) * (uint32_t)(slope_k + 392UL)
+ (offset_k << 3UL);

/* Get integer part of the INTCAP code */
uint32_t lfxo_intcap = mid_val >> 9UL;
Expand Down Expand Up @@ -139,9 +129,8 @@ static inline void power_and_clock_configuration(void)
*/
uint32_t cap_val_femto_f = DT_PROP(HFXO_NODE, load_capacitance_femtofarad);

uint32_t mid_val_intcap = (((cap_val_femto_f - 5500UL) * (uint32_t)(slope_m + 791UL)) +
(offset_m << 2UL) * 1000UL) >>
8UL;
uint32_t mid_val_intcap = (((cap_val_femto_f - 5500UL) * (uint32_t)(slope_m + 791UL))
+ (offset_m << 2UL) * 1000UL) >> 8UL;

/* Convert the calculated value to piko Farads */
uint32_t hfxo_intcap = mid_val_intcap / 1000;
Expand Down Expand Up @@ -171,39 +160,21 @@ static inline void power_and_clock_configuration(void)
#endif
nrf_regulators_vreg_enable_set(NRF_REGULATORS, NRF_REGULATORS_VREG_MAIN, true);
#endif

}
#endif /* NRF_APPLICATION */
#endif /* NRF_APPLICATION && !CONFIG_TRUSTED_EXECUTION_NONSECURE */

int nordicsemi_nrf54l_init(void)
{
/* Update the SystemCoreClock global variable with current core clock
* retrieved from hardware state.
* retrieved from the DT.
*/
SystemCoreClock = NRF_PERIPH_GET_FREQUENCY(DT_NODELABEL(cpu));

#ifdef __NRF_TFM__
/* TF-M enables the instruction cache from target_cfg.c, so we
* don't need to enable it here.
*/
#else

/* Update SystemCoreClock in Zephyr based on device tree to avoid SystemCoreClock
* being overwritten with default value when initializing with TF-M
*/
SystemCoreClock = DEVICE_DT_CLOCK_FREQ;

/* Enable ICACHE */
sys_cache_instr_enable();
#endif

/* NRF_REGULATORS and NRF_OSCILLATORS are configured to be secure
* as NRF_REGULATORS.POFCON is needed by the secure domain to
* prevent glitches when the power supply is attacked.
*
* NRF_OSCILLATORS is also configured as secure because of a HW limitation
* that requires them to be configured with the same security property.
*/
#if (defined(NRF_APPLICATION) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)) || \
defined(__NRF_TFM__)
#if (defined(NRF_APPLICATION) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)) || \
!defined(__ZEPHYR__)
power_and_clock_configuration();
#endif

Expand Down
12 changes: 11 additions & 1 deletion tests/kernel/timer/timer_api/src/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -680,10 +680,20 @@ ZTEST_USER(timer_api, test_timer_remaining)
uint32_t dur_ticks = k_ms_to_ticks_ceil32(DURATION);
uint32_t target_rem_ticks = k_ms_to_ticks_ceil32(DURATION / 2);
uint32_t rem_ms, rem_ticks, exp_ticks;
uint32_t latency_ticks;
int32_t delta_ticks;
uint32_t slew_ticks;
uint64_t now;

/* Test is running in a user space thread so there is an additional latency
* involved in executing k_busy_wait and k_timer_remaining_ticks. Due
* to that latency, returned ticks won't be exact as expected even if
* k_busy_wait is running using the same clock source as the system clock.
* If system clock frequency is low (e.g. 100Hz) 1 tick will be enough but
* for cases where clock frequency is much higher we need to accept higher
* deviation (in ticks). Arbitrary value of 100 us processing overhead is used.
*/
latency_ticks = k_us_to_ticks_ceil32(100);

init_timer_data();
k_timer_start(&remain_timer, K_MSEC(DURATION), K_NO_WAIT);
Expand Down Expand Up @@ -713,7 +723,7 @@ ZTEST_USER(timer_api, test_timer_remaining)
*/
delta_ticks = (int32_t)(rem_ticks - target_rem_ticks);
slew_ticks = BUSY_SLEW_THRESHOLD_TICKS(DURATION * USEC_PER_MSEC / 2U);
zassert_true(abs(delta_ticks) <= MAX(slew_ticks, 1U),
zassert_true(abs(delta_ticks) <= MAX(slew_ticks, latency_ticks),
"tick/busy slew %d larger than test threshold %u",
delta_ticks, slew_ticks);

Expand Down