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Make outlined function arguments non-aliasing #1006

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Make outlined function arguments non-aliasing #1006

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38af93d
Analysing the .ll and .opt.ll files with and without aliasing I think…
newling Jan 3, 2025
297e026
update test
newling Jan 3, 2025
c9f4c7a
squish
newling Jan 3, 2025
bdca688
only noalias memrefs
newling Jan 3, 2025
0b85be2
Revert "squish"
newling Jan 3, 2025
b5a70b9
update test
newling Jan 3, 2025
38dd0e7
reorder
newling Jan 3, 2025
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39 changes: 20 additions & 19 deletions .github/workflows/ci-linux.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -160,6 +160,26 @@ jobs:
echo "XRT_LITE_N_CORE_ROWS=$(python build_tools/ci/amdxdna_driver_utils/amdxdna_ioctl.py --num-rows)" >> $GITHUB_ENV
echo "XRT_LITE_N_CORE_COLS=$(python build_tools/ci/amdxdna_driver_utils/amdxdna_ioctl.py --num-cols)" >> $GITHUB_ENV

# Run the 'Performance' tests. These do not check numerical correctness,
# just measure the time to run some workloads.
- name : Performance benchmarks
run: |
source .venv/bin/activate
python build_tools/ci/cpu_comparison/run.py \
test_aie_vs_cpu \
$PWD/iree-install \
--peano_dir=$PWD/llvm-aie \
--vitis_dir=/opt/Xilinx/Vitis/2024.2 \
--target_device="npu1_4col" \
--reset_npu_between_runs -v \
--xrt_lite_n_core_rows=$XRT_LITE_N_CORE_ROWS \
--xrt_lite_n_core_cols=$XRT_LITE_N_CORE_COLS \
--tests=Performance > performance.log

# Print a summary of the findings.
python build_tools/ci/cpu_comparison/performance_summarizer.py \
performance.log

- name: E2E correctness matmul test
run: |
# https://stackoverflow.com/a/17567422
Expand Down Expand Up @@ -188,25 +208,6 @@ jobs:
--xrt_lite_n_core_cols=$XRT_LITE_N_CORE_COLS \
--skip_tests=Performance

# Run the 'Performance' tests. These do not check numerical correctness,
# just measure the time to run some workloads.
- name : Performance benchmarks
run: |
source .venv/bin/activate
python build_tools/ci/cpu_comparison/run.py \
test_aie_vs_cpu \
$PWD/iree-install \
--peano_dir=$PWD/llvm-aie \
--vitis_dir=/opt/Xilinx/Vitis/2024.2 \
--target_device="npu1_4col" \
--reset_npu_between_runs -v \
--xrt_lite_n_core_rows=$XRT_LITE_N_CORE_ROWS \
--xrt_lite_n_core_cols=$XRT_LITE_N_CORE_COLS \
--tests=Performance > performance.log

# Print a summary of the findings.
python build_tools/ci/cpu_comparison/performance_summarizer.py \
performance.log

- name: XRT-LITE tests
run: |
Expand Down
10 changes: 9 additions & 1 deletion compiler/plugins/target/AMD-AIE/iree-amd-aie/Transforms/AMDAIELowerToAIE.cpp
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Expand Up @@ -28,7 +28,6 @@
#include "llvm/Support/Debug.h"
#include "mlir/Dialect/Utils/StaticValueUtils.h"
#include "mlir/IR/IRMapping.h"
#include "mlir/IR/Iterators.h"
#include "mlir/Pass/PassManager.h"

#define DEBUG_TYPE "iree-amdaie-lower-to-aie"
Expand Down Expand Up @@ -433,6 +432,15 @@ LogicalResult AIEDeviceBuilder::coreFuncCallOpToAIE(
SymbolTable::setSymbolVisibility(newFnDecl,
SymbolTable::Visibility::Private);
newFnDecl->setAttr("llvm.bareptr", rewriter.getBoolAttr(true));

// Add the 'noalias' attribute to all argument attributes, if the type is
// memref:
auto noAliasAttrName = LLVM::LLVMDialect::getNoAliasAttrName();
for (int i = 0; i < newArgs.size(); ++i) {
if (isa<MemRefType>(newArgs[i].getType())) {
newFnDecl.setArgAttr(i, noAliasAttrName, rewriter.getUnitAttr());
}
}
fnDecl.getBody().cloneInto(&(newFnDecl.getBody()), mapper);
mapper.map(fnDecl.getOperation(), newFnDecl.getOperation());
fnDecl = newFnDecl;
Expand Down
5 changes: 3 additions & 2 deletions compiler/plugins/target/AMD-AIE/iree-amd-aie/Transforms/test/lower_to_aie.mlir
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Expand Up @@ -897,9 +897,10 @@ module attributes {hal.executable.target = #executable_target_amdaie_xclbin_fb}

// -----


// CHECK: aie.device
// CHECK: func.func private @ukernel_B(memref<i32, 2 : i32>, index, memref<f32, 2 : i32>, index) attributes {llvm.bareptr = true}
// CHECK: func.func private @ukernel_A(memref<i32, 2 : i32>, index) attributes {llvm.bareptr = true}
// CHECK: func.func private @ukernel_B(memref<i32, 2 : i32> {llvm.noalias}, index, memref<f32, 2 : i32> {llvm.noalias}, index) attributes {llvm.bareptr = true}
// CHECK: func.func private @ukernel_A(memref<i32, 2 : i32> {llvm.noalias}, index) attributes {llvm.bareptr = true}
// CHECK: %[[TILE_0_2:.*]] = aie.tile(0, 2)
// CHECK: %[[BUFFER_0_2:.*]] = aie.buffer(%[[TILE_0_2]]) {sym_name = "buff_0"} : memref<4096xi32, 2 : i32>
// CHECK: %[[LOCK_0_2:.*]] = aie.lock(%[[TILE_0_2]], 0) {init = 1 : i8, sym_name = "lock_0"}
Expand Down
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