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Add preemption capability
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jtuyls committed Dec 16, 2024
1 parent f8a9394 commit c1047c7
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4 changes: 2 additions & 2 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -47,11 +47,11 @@ Build and install `xdna-driver`, use commit `59f1d62`:
git clone [email protected]:amd/xdna-driver.git
cd <root-of-source-tree>
# get code for submodules
git checkout 59f1d62
git checkout 929e8ab
git submodule update --init --recursive
```

Follow the instructions to build and install the driver module: [xdna-driver](https://github.com/amd/xdna-driver/tree/59f1d6235334499b22dbd056a60ab00bfec142ee).
Follow the instructions to build and install the driver module: [xdna-driver](https://github.com/amd/xdna-driver/tree/929e8ab459cab5915631849b9f1ef9a4982d1c11).

## Building (along with IREE)

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Original file line number Diff line number Diff line change
Expand Up @@ -57,6 +57,23 @@ enum amdxdna_device_type {
AMDXDNA_DEV_TYPE_UMQ,
};

/*
* Enum for priority in application's QoS. Values copied from Window shim layer.
* AMDXDNA_QOS_DEFAULT_PRIORITY: Default priority.
* AMDXDNA_QOS_REALTIME_PRIORITY: Real time clients.
* AMDXDNA_QOS_HIGH_PRIORITY: Best effort foreground clients.
* AMDXDNA_QOS_NORMAL_PRIORITY: Best effort or background clients.
* AMDXDNA_QOS_LOW_PRIORITY: Clients that can wait indefinite amount of time for
* completion.
*/
enum amdxdna_qos_priority {
AMDXDNA_QOS_DEFAULT_PRIORITY = 0x0,
AMDXDNA_QOS_REALTIME_PRIORITY = 0x100,
AMDXDNA_QOS_HIGH_PRIORITY = 0x180,
AMDXDNA_QOS_NORMAL_PRIORITY = 0x200,
AMDXDNA_QOS_LOW_PRIORITY = 0x280
};

/**
* struct qos_info - QoS information for driver.
* @gops: Giga operations per second.
Expand Down Expand Up @@ -496,6 +513,17 @@ struct amdxdna_drm_query_firmware_version {
__u32 build; /* out */
};

/**
* struct amdxdna_drm_get_force_preempt_state - Get force preemption state.
* @force_preempt_state: 1 implies force preemption is enabled.
* 0 implies disabled.
* @pad: MBZ.
*/
struct amdxdna_drm_get_force_preempt_state {
__u8 state;
__u8 pad[7];
};

enum amdxdna_drm_get_param {
DRM_AMDXDNA_QUERY_AIE_STATUS,
DRM_AMDXDNA_QUERY_AIE_METADATA,
Expand All @@ -508,6 +536,7 @@ enum amdxdna_drm_get_param {
DRM_AMDXDNA_QUERY_FIRMWARE_VERSION,
DRM_AMDXDNA_GET_POWER_MODE,
DRM_AMDXDNA_QUERY_TELEMETRY,
DRM_AMDXDNA_GET_FORCE_PREEMPT_STATE,
DRM_AMDXDNA_NUM_GET_PARAM,
};

Expand All @@ -534,10 +563,22 @@ struct amdxdna_drm_set_power_mode {
__u8 pad[7];
};

/**
* struct amdxdna_drm_set_force_preempt_state - set force preemption state
* @force_preempt_state: 1 implies force preemption is enabled.
* 0 implies disabled
* @pad: MBZ.
*/
struct amdxdna_drm_set_force_preempt_state {
__u8 state;
__u8 pad[7];
};

enum amdxdna_drm_set_param {
DRM_AMDXDNA_SET_POWER_MODE,
DRM_AMDXDNA_WRITE_AIE_MEM,
DRM_AMDXDNA_WRITE_AIE_REG,
DRM_AMDXDNA_SET_FORCE_PREEMPT,
DRM_AMDXDNA_NUM_SET_PARAM,
};

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Original file line number Diff line number Diff line change
Expand Up @@ -33,7 +33,6 @@ int wait_cmd(const shim_xdna::pdev &pdev, const shim_xdna::hw_ctx *ctx,

if (syncobj != AMDXDNA_INVALID_FENCE_HANDLE) {
int64_t timeout = std::numeric_limits<int64_t>::max();

if (timeout_ms) {
timeout = timeout_ms;
timeout *= 1000000;
Expand All @@ -54,7 +53,6 @@ int wait_cmd(const shim_xdna::pdev &pdev, const shim_xdna::hw_ctx *ctx,
"DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT IOCTL failed");
}
}
// pdev.ioctl(DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT, &wsobj);
} else {
amdxdna_drm_wait_cmd wcmd = {
.hwctx = ctx->m_handle,
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