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[Router] Erase packet_flow operations after routing (#1088)
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@Yu-Zhewen
Yu-Zhewen authored Feb 7, 2025
1 parent 416a925 commit 2751586
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Showing 7 changed files with 3 additions and 119 deletions.
4 changes: 3 additions & 1 deletion compiler/plugins/target/AMD-AIE/aie/AMDAIECreatePathFindFlows.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -190,7 +190,8 @@ LogicalResult runOnPacketFlow(

DenseMap<PhysPort, Attribute> keepPktHeaderAttr;
TileLocToConnectionFlowIDT switchboxes;
for (PacketFlowOp pktFlowOp : device.getOps<PacketFlowOp>()) {
for (PacketFlowOp pktFlowOp :
make_early_inc_range(device.getOps<PacketFlowOp>())) {
int flowID = pktFlowOp.getID();
Port srcPort{StrmSwPortType::SS_PORT_TYPE_MAX, -1};
TileOp srcTile;
Expand Down Expand Up @@ -244,6 +245,7 @@ LogicalResult runOnPacketFlow(
}
}
}
pktFlowOp.erase();
}

SmallVector<TileLoc> tileLocs = llvm::map_to_vector(
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16 changes: 0 additions & 16 deletions compiler/plugins/target/AMD-AIE/aie/test/test_congestion0.mlir
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Expand Up @@ -86,22 +86,6 @@
// CHECK: aie.rule(31, 3, %[[VAL_26]])
// CHECK: }
// CHECK: }
// CHECK: aie.packet_flow(0) {
// CHECK: aie.packet_source<%[[TILE_0_2]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_0_1]], DMA : 0>
// CHECK: }
// CHECK: aie.packet_flow(1) {
// CHECK: aie.packet_source<%[[TILE_0_3]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_0_1]], DMA : 1>
// CHECK: }
// CHECK: aie.packet_flow(2) {
// CHECK: aie.packet_source<%[[TILE_0_4]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_0_1]], DMA : 2>
// CHECK: }
// CHECK: aie.packet_flow(3) {
// CHECK: aie.packet_source<%[[TILE_0_5]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_0_1]], DMA : 3>
// CHECK: }
// CHECK: }
module {
aie.device(npu1_1col) {
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4 changes: 0 additions & 4 deletions compiler/plugins/target/AMD-AIE/aie/test/test_congestion1.mlir
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Expand Up @@ -63,10 +63,6 @@
// CHECK: %[[SHIM_MUX_0_0:.*]] = aie.shim_mux(%[[TILE_0_0]]) {
// CHECK: aie.connect<NORTH : 2, DMA : 0>
// CHECK: }
// CHECK: aie.packet_flow(0) {
// CHECK: aie.packet_source<%[[TILE_0_5]], DMA : 1>
// CHECK: aie.packet_dest<%[[TILE_0_1]], DMA : 4>
// CHECK: }
// CHECK: }
module {
aie.device(npu1_2col) {
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9 changes: 0 additions & 9 deletions compiler/plugins/target/AMD-AIE/aie/test/test_create_packet_flows2.mlir
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Expand Up @@ -12,15 +12,6 @@
// CHECK-DAG: aie.rule(31, 1, %[[VAL_1]])
// CHECK: }
// CHECK: }
// CHECK: aie.packet_flow(0) {
// CHECK: aie.packet_source<%[[TILE_1_1]], WEST : 0>
// CHECK: aie.packet_dest<%[[TILE_1_1]], CORE : 0>
// CHECK: aie.packet_dest<%[[TILE_1_1]], CORE : 1>
// CHECK: }
// CHECK: aie.packet_flow(1) {
// CHECK: aie.packet_source<%[[TILE_1_1]], WEST : 0>
// CHECK: aie.packet_dest<%[[TILE_1_1]], CORE : 1>
// CHECK: }
// CHECK: }

module @test_create_packet_flows2 {
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9 changes: 0 additions & 9 deletions compiler/plugins/target/AMD-AIE/aie/test/test_create_packet_flows3.mlir
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Expand Up @@ -14,15 +14,6 @@
// CHECK: aie.rule(31, 1, %[[VAL_1]])
// CHECK: }
// CHECK: }
// CHECK: aie.packet_flow(0) {
// CHECK: aie.packet_source<%[[TILE_1_1]], WEST : 0>
// CHECK: aie.packet_dest<%[[TILE_1_1]], CORE : 0>
// CHECK: aie.packet_dest<%[[TILE_1_1]], CORE : 1>
// CHECK: }
// CHECK: aie.packet_flow(1) {
// CHECK: aie.packet_source<%[[TILE_1_1]], WEST : 1>
// CHECK: aie.packet_dest<%[[TILE_1_1]], CORE : 1>
// CHECK: }
// CHECK: }

module @test_create_packet_flows3 {
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16 changes: 0 additions & 16 deletions compiler/plugins/target/AMD-AIE/aie/test/test_create_packet_flows6.mlir
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Expand Up @@ -50,22 +50,6 @@
// CHECK: aie.rule(31, 3, %[[VAL_14]])
// CHECK: }
// CHECK: }
// CHECK: aie.packet_flow(0) {
// CHECK: aie.packet_source<%[[TILE_2_2]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_3_2]], DMA : 0>
// CHECK: }
// CHECK: aie.packet_flow(1) {
// CHECK: aie.packet_source<%[[TILE_2_2]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_4_2]], DMA : 0>
// CHECK: }
// CHECK: aie.packet_flow(2) {
// CHECK: aie.packet_source<%[[TILE_2_2]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_5_2]], DMA : 0>
// CHECK: }
// CHECK: aie.packet_flow(3) {
// CHECK: aie.packet_source<%[[TILE_2_2]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_6_2]], DMA : 0>
// CHECK: }
// CHECK: }
module @test_create_packet_flows6 {
aie.device(xcvc1902) {
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64 changes: 0 additions & 64 deletions compiler/plugins/target/AMD-AIE/aie/test/test_pktflow_weight_pusher.mlir
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Expand Up @@ -222,70 +222,6 @@
// CHECK: aie.rule(24, 8, %[[VAL_76]])
// CHECK: }
// CHECK: }
// CHECK: aie.packet_flow(0) {
// CHECK: aie.packet_source<%[[TILE_6_5]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_2_2]], DMA : 1>
// CHECK: }
// CHECK: aie.packet_flow(1) {
// CHECK: aie.packet_source<%[[TILE_6_5]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_2_3]], DMA : 1>
// CHECK: }
// CHECK: aie.packet_flow(2) {
// CHECK: aie.packet_source<%[[TILE_6_5]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_2_4]], DMA : 1>
// CHECK: }
// CHECK: aie.packet_flow(3) {
// CHECK: aie.packet_source<%[[TILE_6_5]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_2_5]], DMA : 1>
// CHECK: }
// CHECK: aie.packet_flow(4) {
// CHECK: aie.packet_source<%[[TILE_6_5]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_3_2]], DMA : 1>
// CHECK: }
// CHECK: aie.packet_flow(5) {
// CHECK: aie.packet_source<%[[TILE_6_5]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_3_3]], DMA : 1>
// CHECK: }
// CHECK: aie.packet_flow(6) {
// CHECK: aie.packet_source<%[[TILE_6_5]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_3_4]], DMA : 1>
// CHECK: }
// CHECK: aie.packet_flow(7) {
// CHECK: aie.packet_source<%[[TILE_6_5]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_3_5]], DMA : 1>
// CHECK: }
// CHECK: aie.packet_flow(8) {
// CHECK: aie.packet_source<%[[TILE_7_5]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_4_2]], DMA : 1>
// CHECK: }
// CHECK: aie.packet_flow(9) {
// CHECK: aie.packet_source<%[[TILE_7_5]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_4_3]], DMA : 1>
// CHECK: }
// CHECK: aie.packet_flow(10) {
// CHECK: aie.packet_source<%[[TILE_7_5]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_4_4]], DMA : 1>
// CHECK: }
// CHECK: aie.packet_flow(11) {
// CHECK: aie.packet_source<%[[TILE_7_5]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_4_5]], DMA : 1>
// CHECK: }
// CHECK: aie.packet_flow(12) {
// CHECK: aie.packet_source<%[[TILE_7_5]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_5_2]], DMA : 1>
// CHECK: }
// CHECK: aie.packet_flow(13) {
// CHECK: aie.packet_source<%[[TILE_7_5]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_5_3]], DMA : 1>
// CHECK: }
// CHECK: aie.packet_flow(14) {
// CHECK: aie.packet_source<%[[TILE_7_5]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_5_4]], DMA : 1>
// CHECK: }
// CHECK: aie.packet_flow(15) {
// CHECK: aie.packet_source<%[[TILE_7_5]], DMA : 0>
// CHECK: aie.packet_dest<%[[TILE_5_5]], DMA : 1>
// CHECK: }
// CHECK: }
module @test_pktflow_weight_pusher {
aie.device(xcvc1902) {
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