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newling committed Jan 8, 2025
1 parent f76c245 commit 0857589
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Showing 3 changed files with 17 additions and 4 deletions.
2 changes: 1 addition & 1 deletion build_tools/peano_commit.txt
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@@ -1 +1 @@
19.0.0.2024092601+562ccea2
19.0.0.2025010801+d0eacebf
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Expand Up @@ -28,7 +28,6 @@
#include "llvm/Support/Debug.h"
#include "mlir/Dialect/Utils/StaticValueUtils.h"
#include "mlir/IR/IRMapping.h"
#include "mlir/IR/Iterators.h"
#include "mlir/Pass/PassManager.h"

#define DEBUG_TYPE "iree-amdaie-lower-to-aie"
Expand Down Expand Up @@ -433,6 +432,19 @@ LogicalResult AIEDeviceBuilder::coreFuncCallOpToAIE(
SymbolTable::setSymbolVisibility(newFnDecl,
SymbolTable::Visibility::Private);
newFnDecl->setAttr("llvm.bareptr", rewriter.getBoolAttr(true));

// Add the 'noalias' attribute to all argument attributes, if the type is
// memref:
auto noAliasAttrName = LLVM::LLVMDialect::getNoAliasAttrName();
// The read-only attribute:
auto readOnlyAttrName = LLVM::LLVMDialect::getReadonlyAttrName();
for (int i = 0; i < newArgs.size(); ++i) {
if (isa<MemRefType>(newArgs[i].getType())) {
newFnDecl.setArgAttr(i, noAliasAttrName, rewriter.getUnitAttr());
}
}
(void)readOnlyAttrName;
(void)noAliasAttrName;
fnDecl.getBody().cloneInto(&(newFnDecl.getBody()), mapper);
mapper.map(fnDecl.getOperation(), newFnDecl.getOperation());
fnDecl = newFnDecl;
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Expand Up @@ -897,9 +897,10 @@ module attributes {hal.executable.target = #executable_target_amdaie_xclbin_fb}

// -----


// CHECK: aie.device
// CHECK: func.func private @ukernel_B(memref<i32, 2 : i32>, index, memref<f32, 2 : i32>, index) attributes {llvm.bareptr = true}
// CHECK: func.func private @ukernel_A(memref<i32, 2 : i32>, index) attributes {llvm.bareptr = true}
// CHECK: func.func private @ukernel_B(memref<i32, 2 : i32> {llvm.noalias}, index, memref<f32, 2 : i32> {llvm.noalias}, index) attributes {llvm.bareptr = true}
// CHECK: func.func private @ukernel_A(memref<i32, 2 : i32> {llvm.noalias}, index) attributes {llvm.bareptr = true}
// CHECK: %[[TILE_0_2:.*]] = aie.tile(0, 2)
// CHECK: %[[BUFFER_0_2:.*]] = aie.buffer(%[[TILE_0_2]]) {sym_name = "buff_0"} : memref<4096xi32, 2 : i32>
// CHECK: %[[LOCK_0_2:.*]] = aie.lock(%[[TILE_0_2]], 0) {init = 1 : i8, sym_name = "lock_0"}
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