ADC sequence of G0 (and C0) devicec have wrong channel shift? #1197
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Apehaenger
commented
Aug 12, 2024
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The register layout for C0 look equal. Regarding the unrelated submodule: |
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While still working on my STM32C0x implementation #1188, I had a head-cruncher by building a ADC-Sequence example.
For me it looks like the implementation is wrong as it shifts the ADC channel only by 1 bit instead of 4.
So in my opinion ADC sequences can't work for
F0,G0 as well as C0 devices?!