Skip to content
View minsheng0503's full-sized avatar

Block or report minsheng0503

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. ICDC2023_grad ICDC2023_grad Public

    2023 IC Contest(grad)

    Verilog 2

  2. ICDC2021_grad ICDC2021_grad Public

    2021 IC Contest(grad)

    Verilog

  3. ColorDetection ColorDetection Public

    C++

  4. Digital-Signal-Processing-VLSI-Architecture-Design Digital-Signal-Processing-VLSI-Architecture-Design Public

    NCU EE (2022 Fall)

    Verilog

  5. VLSI-Testing VLSI-Testing Public

    NCU EE (2022 Fall)

    Verilog

  6. Color-Ball-MAX78000 Color-Ball-MAX78000 Public

    A color recognition project using SSD model on MAX78000

    C