This is the McSimA+ [1] simulator modified to use modern C++ (C++17) features. McSimA+ is a timing simulation infrastructure that models x86-based manycore microarchitectures in detail for both core and uncore subsystems, including a full spectrum of out-of-order cores from single-threaded to multithreaded, sophisticated cache hierarchies, coherence hardware, on-chip interconnects, memory controllers, and main memory. Jung Ho Ahn started to develop McSimA+ when he was at HP Labs. For further questions and suggestions, please contact Jung Ho Ahn.
The released source includes these subdirectories:
Apps
: contains runfile, mdfile and utilities.McSim
: contains source codes for timing simulator (Back-end).Pthread
: contains source code for functional simulator (Front-end).TraceGen
: contains a trace generator pin tool.
McSimA+ was tested under the following system.
- OS: Ubuntu 20.04.3 LTS (Kernel 5.11.0)
- Compiler: gcc version 9.3.0
- Tool: Intel Pin 3.21
To build the McSimA+ simulator on Linux, first clone the github repository, which includes the required packages as git submodules:
- McSimA+
git clone [email protected]:scale-snu/mcsim_public.git --recursive
or
$ git clone https://github.com/scale-snu/mcsim_public.git --recursive
$ cd third-party/gflags
$ mkdir -p build && cd build
$ cmake .. -DCMAKE_INSTALL_PREFIX="$(pwd)"/../../../build -DBUILD_SHARED_LIBS=ON
$ make -j2
$ make install
$ cd third-party/glog
$ mkdir -p build && cd build
$ cmake .. -DCMAKE_INSTALL_PREFIX="$(pwd)"/../../../build -DBUILD_SHARED_LIBS=ON -Dgflags_DIR="$(pwd)"/../../../build
$ make -j2
$ make install
$ cd third-party/snappy
$ mkdir -p build && cd build
$ cmake ..
$ cd third-party/googletest
$ mkdir -p build && cd build
$ cmake .. -DCMAKE_INSTALL_PREFIX="$(pwd)"/../../../build -DBUILD_SHARED_LIBS=ON
$ make -j2
$ make install
- Download the Pin at Pin - A Binary Instrumentation Tool.
$ cd third-party
$ wget https://software.intel.com/sites/landingpage/pintool/downloads/pin-3.21-98484-ge7cd811fd-gcc-linux.tar.gz
$ tar -xvf pin-3.21-98484-ge7cd811fd-gcc-linux.tar.gz
- Create a
Pin
symbolic link in themcsim_public
directory.
$ ln -s "$(pwd)"/pin-3.21-98484-ge7cd811fd-gcc-linux "$(pwd)"/../pin
- Go to
McSim
and compile McSim. (To build the back-end, the absolute path ofpin
header is required)
$ cd ../McSim
$ mkdir -p build && cd build
$ cmake ..
$ make -j2
- Go to
Pthread
and compile the user-level thread library pin tool [2] (calledmypthreadtool
) as a dynamic library. (To build the front-end, the absolute path ofpin
root directory should be provided)
$ cd ../../Pthread
$ make PIN_ROOT="$(pwd)"/../pin obj-intel64/mypthreadtool.so -j2
$ make PIN_ROOT="$(pwd)"/../pin obj-intel64/libmypthread.a
- Go to
TraceGen
and compile the trace generator pin tool.
$ cd ../TraceGen
$ make PIN_ROOT="$(pwd)"/../pin obj-intel64/tracegen.so -j2
There is an example pthread application called stream
in McSim. It
is similar to the popular stream benchmark that adds two streams. To
run stream
on top of the McSim framework,
- Go to McSim/stream and compile stream.
$ cd ../McSim/stream
$ make
- Add directories containing
pin
andmypthreadtool
to the$PATH
environment variable.
$ cd ../../
$ source bash_setup
# 'bash_setup' file is written as follows.
BASE="$(pwd)"
export PIN=${BASE}/pin/pin
export PINTOOL=${BASE}/Pthread/obj-intel64/mypthreadtool.so
export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:${BASE}/build/lib
export CPLUS_INCLUDE_PATH=$CPLUS_INCLUDE_PATH:${BASE}/build/include
export C_INCLUDE_PATH=$C_INCLUDE_PATH:${BASE}/build/include
- Add the absolute path of
stream
directory toApps/list/run-stream.toml
[[run]]
type = "pintool"
num_threads = 4
num_instrs_to_skip_first = 0
### Add the absolute path of stream directory ###
path = "/home/gajh/repository/mcsim_public/McSim/stream"
arg = "STREAM -p4 -n1048576 -r10 -s512"
- Type the following command:
$ setarch x86_64 -R ./McSim/build/mcsim -mdfile Apps/md/o3-closed.toml -runfile Apps/list/run-stream.toml -logtostderr=true
McSimA+ supports trace-driven simulation. TraceGen
executes the
program using Pin, and extracts proper values corresponding to
instructions and addresses to the snappy file. In order to generate
snappy files and play traces, try the following example:
- Generate a snappy file extracted form
/bin/ls
.
# 'TraceGen' has following options.
-prefix #: the name of the output snappy file
-slice_size # p1 p2 .. : SLICE_SIZE and simulation points to extract (p1 p2 ..)
$ ./pin/pin -t TraceGen/obj-intel64/tracegen.so -prefix test -slice_size 100000 0 -- /bin/ls /
[ 0] here
++ num_ins : (mem_rd, mem_wr, 2nd_mem_rd, all)=( 23290, 9140, 0, 100000)
- Generate a runfile for the trace file to
Apps/list
in the following format.
$ mv test.0.snappy /tmp
$ vim Apps/list/run-trace.toml
[[run]]
type = "trace"
num_instrs_to_skip_first = 0
trace_file = "/tmp/test.0.snappy"
path = "/home/gajh/repository/mcsim_public/McSim/stream"
arg = "STREAM"
- To play the trace file, Type the following command:
$ ./McSim/build/mcsim -mdfile Apps/md/o3-closed.toml -runfile Apps/list/run-trace.toml
You can change the configureation of the architecture you will
simulate by modifying the md.toml
file. It uses TOML language.
Most parameters are named intuitively, but please check the source files to understand
the meaning of parameters that are not clear.
[1] J. Ahn, S. Li, S. O and N. P. Jouppi, "McSimA+: A Manycore Simulator with Application-level+ Simulation and Detailed Microarchitecture Modeling," in Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Austin, TX, USA, April 2013.
[2] H. Pan, K. Asanovic, R. Cohn and C. K. Luk, "Controlling Program Execution through Binary Instrumentation," Computer Architecture News, vol.33, no.5, 2005.