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Add the RA8M1 Board #141

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Add the RA8M1 Board #141

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4 changes: 4 additions & 0 deletions .gitmodules
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Expand Up @@ -25,3 +25,7 @@
[submodule "Boards/MCK_RA6T2/micro_ros_can/micro_ros_renesas2estudio_component"]
path = Boards/MCK_RA6T2/micro_ros_can/micro_ros_renesas2estudio_component
url = https://github.com/micro-ROS/micro_ros_renesas2estudio_component
[submodule "Boards/EK_R8AM1/micro_ros_udp_threadx/micro_ros_renesas2estudio_component"]
path = Boards/EK_R8AM1/micro_ros_udp_threadx/micro_ros_renesas2estudio_component
url = https://github.com/micro-ROS/micro_ros_renesas2estudio_component
branch = humble
Binary file added .images/renesas_toolchain_management.png
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39 changes: 39 additions & 0 deletions Boards/EK_R8AM1/.project
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<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>micro_ros_udp_threadx</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
<buildCommand>
<name>com.renesas.cdt.ddsc.contentgen.ddscBuilder</name>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<triggers>clean,full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<triggers>full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>com.renesas.cdt.ddsc.contentgen.ddscInterlockBundleBuilder</name>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
<nature>org.eclipse.cdt.core.ccnature</nature>
<nature>com.renesas.cdt.ddsc.contentgen.ddscNature</nature>
<nature>com.renesas.cdt.ra.contentgen.raNature</nature>
</natures>
</projectDescription>
2 changes: 2 additions & 0 deletions Boards/EK_R8AM1/micro_ros_udp_threadx/.api_xml
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<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
<ddscApi/>
709 changes: 709 additions & 0 deletions Boards/EK_R8AM1/micro_ros_udp_threadx/.cproject
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39 changes: 39 additions & 0 deletions Boards/EK_R8AM1/micro_ros_udp_threadx/.project
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<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>micro_ros_udp_threadx</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
<buildCommand>
<name>com.renesas.cdt.ddsc.contentgen.ddscBuilder</name>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<triggers>clean,full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<triggers>full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>com.renesas.cdt.ddsc.contentgen.ddscInterlockBundleBuilder</name>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
<nature>org.eclipse.cdt.core.ccnature</nature>
<nature>com.renesas.cdt.ddsc.contentgen.ddscNature</nature>
<nature>com.renesas.cdt.ra.contentgen.raNature</nature>
</natures>
</projectDescription>
86 changes: 86 additions & 0 deletions Boards/EK_R8AM1/micro_ros_udp_threadx/.secure_azone
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<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
<azone>
<rzone name="R7FA8M1AHECBD.rzone"/>
<partition>
<peripheral name="PORT0" group="PORT">
<slot name="P000" secure="true"/>
<slot name="P002" secure="true"/>
<slot name="P003" secure="true"/>
<slot name="P004" secure="true"/>
<slot name="P005" secure="true"/>
<slot name="P007" secure="true"/>
<slot name="P008" secure="true"/>
<slot name="P009" secure="true"/>
<slot name="P014" secure="true"/>
<slot name="P015" secure="true"/>
</peripheral>
<peripheral name="PORT1" group="PORT">
<slot name="P100" secure="true"/>
<slot name="P101" secure="true"/>
<slot name="P102" secure="true"/>
<slot name="P103" secure="true"/>
<slot name="P104" secure="true"/>
<slot name="P105" secure="true"/>
<slot name="P106" secure="true"/>
<slot name="P107" secure="true"/>
</peripheral>
<peripheral name="PORT2" group="PORT">
<slot name="P208" secure="true"/>
<slot name="P209" secure="true"/>
<slot name="P210" secure="true"/>
<slot name="P211" secure="true"/>
</peripheral>
<peripheral name="PORT4" group="PORT">
<slot name="P401" secure="true"/>
<slot name="P402" secure="true"/>
<slot name="P403" secure="true"/>
<slot name="P405" secure="true"/>
<slot name="P406" secure="true"/>
<slot name="P407" secure="true"/>
<slot name="P408" secure="true"/>
<slot name="P409" secure="true"/>
<slot name="P410" secure="true"/>
<slot name="P411" secure="true"/>
<slot name="P412" secure="true"/>
<slot name="P413" secure="true"/>
<slot name="P414" secure="true"/>
</peripheral>
<peripheral name="PORT5" group="PORT">
<slot name="P500" secure="true"/>
<slot name="P501" secure="true"/>
<slot name="P511" secure="true"/>
<slot name="P512" secure="true"/>
</peripheral>
<peripheral name="PORT6" group="PORT">
<slot name="P600" secure="true"/>
</peripheral>
<peripheral name="PORT7" group="PORT">
<slot name="P700" secure="true"/>
<slot name="P701" secure="true"/>
<slot name="P702" secure="true"/>
<slot name="P703" secure="true"/>
<slot name="P704" secure="true"/>
<slot name="P705" secure="true"/>
</peripheral>
<peripheral name="PORT8" group="PORT">
<slot name="P800" secure="true"/>
<slot name="P801" secure="true"/>
<slot name="P802" secure="true"/>
<slot name="P803" secure="true"/>
<slot name="P804" secure="true"/>
<slot name="P808" secure="true"/>
<slot name="P809" secure="true"/>
<slot name="P814" secure="true"/>
<slot name="P815" secure="true"/>
</peripheral>
<peripheral name="PORTB" group="PORT">
<slot name="PB01" secure="true"/>
</peripheral>
<peripheral name="AGT0" group="AGT" security=""/>
<peripheral name="ETHERC0" group="ETHERC" security=""/>
<peripheral name="ICU">
<slot name="IRQ0" secure="true"/>
<slot name="IRQ1" secure="true"/>
</peripheral>
</partition>
</azone>
160 changes: 160 additions & 0 deletions Boards/EK_R8AM1/micro_ros_udp_threadx/.secure_xml
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<raConfiguration version="8">
<generalSettings>
<option key="#Board#" value="board.ra8m1ek"/>
<option key="CPU" value="RA8M1"/>
<option key="Core" value="CM85"/>
<option key="#TargetName#" value="R7FA8M1AHECBD"/>
<option key="#TargetARCHITECTURE#" value="cortex-m85"/>
<option key="#DeviceCommand#" value="R7FA8M1AH"/>
<option key="#RTOS#" value="rtos.threadx"/>
<option key="#pinconfiguration#" value="R7FA8M1AHECBD.pincfg"/>
<option key="#FSPVersion#" value="5.1.0"/>
<option key="#ConfigurationFragments#" value="Renesas##BSP##Board##ra8m1_ek##"/>
<option key="#SELECTED_TOOLCHAIN#" value="gcc-arm-embedded"/>
<option key="#ToolchainVersion#" value="13.2.1.arm-13-7"/>
</generalSettings>
<raBspConfiguration/>
<raClockConfiguration>
<node id="board.clock.xtal.freq" mul="20000000" option="_edit"/>
<node id="board.clock.hoco.freq" option="board.clock.hoco.freq.48m"/>
<node id="board.clock.loco.freq" option="board.clock.loco.freq.32768"/>
<node id="board.clock.moco.freq" option="board.clock.moco.freq.8m"/>
<node id="board.clock.subclk.freq" option="board.clock.subclk.freq.32768"/>
<node id="board.clock.pll.source" option="board.clock.pll.source.xtal"/>
<node id="board.clock.pll.div" option="board.clock.pll.div.1"/>
<node id="board.clock.pll.mul" option="board.clock.pll.mul.48_00"/>
<node id="board.clock.pll.display" option="board.clock.pll.display.value"/>
<node id="board.clock.pll1p.div" option="board.clock.pll1p.div.2"/>
<node id="board.clock.pll1p.display" option="board.clock.pll1p.display.value"/>
<node id="board.clock.pll1q.div" option="board.clock.pll1q.div.2"/>
<node id="board.clock.pll1q.display" option="board.clock.pll1q.display.value"/>
<node id="board.clock.pll1r.div" option="board.clock.pll1r.div.2"/>
<node id="board.clock.pll1r.display" option="board.clock.pll1r.display.value"/>
<node id="board.clock.pll2.source" option="board.clock.pll2.source.disabled"/>
<node id="board.clock.pll2.div" option="board.clock.pll2.div.1"/>
<node id="board.clock.pll2.mul" option="board.clock.pll2.mul.48_00"/>
<node id="board.clock.pll2.display" option="board.clock.pll2.display.value"/>
<node id="board.clock.pll2p.div" option="board.clock.pll2p.div.2"/>
<node id="board.clock.pll2p.display" option="board.clock.pll2p.display.value"/>
<node id="board.clock.pll2q.div" option="board.clock.pll2q.div.2"/>
<node id="board.clock.pll2q.display" option="board.clock.pll2q.display.value"/>
<node id="board.clock.pll2r.div" option="board.clock.pll2r.div.2"/>
<node id="board.clock.pll2r.display" option="board.clock.pll2r.display.value"/>
<node id="board.clock.clock.source" option="board.clock.clock.source.pll1p"/>
<node id="board.clock.clkout.source" option="board.clock.clkout.source.disabled"/>
<node id="board.clock.sciclk.source" option="board.clock.sciclk.source.disabled"/>
<node id="board.clock.spiclk.source" option="board.clock.spiclk.source.disabled"/>
<node id="board.clock.canfdclk.source" option="board.clock.canfdclk.source.disabled"/>
<node id="board.clock.i3cclk.source" option="board.clock.i3cclk.source.disabled"/>
<node id="board.clock.uck.source" option="board.clock.uck.source.disabled"/>
<node id="board.clock.u60ck.source" option="board.clock.u60ck.source.disabled"/>
<node id="board.clock.octaspiclk.source" option="board.clock.octaspiclk.source.disabled"/>
<node id="board.clock.cpuclk.div" option="board.clock.cpuclk.div.1"/>
<node id="board.clock.iclk.div" option="board.clock.iclk.div.2"/>
<node id="board.clock.pclka.div" option="board.clock.pclka.div.4"/>
<node id="board.clock.pclkb.div" option="board.clock.pclkb.div.8"/>
<node id="board.clock.pclkc.div" option="board.clock.pclkc.div.8"/>
<node id="board.clock.pclkd.div" option="board.clock.pclkd.div.4"/>
<node id="board.clock.pclke.div" option="board.clock.pclke.div.2"/>
<node id="board.clock.sdclkout.enable" option="board.clock.sdclkout.enable.enabled"/>
<node id="board.clock.bclk.div" option="board.clock.bclk.div.4"/>
<node id="board.clock.bclkout.div" option="board.clock.bclkout.div.2"/>
<node id="board.clock.fclk.div" option="board.clock.fclk.div.8"/>
<node id="board.clock.clkout.div" option="board.clock.clkout.div.1"/>
<node id="board.clock.sciclk.div" option="board.clock.sciclk.div.4"/>
<node id="board.clock.spiclk.div" option="board.clock.spiclk.div.4"/>
<node id="board.clock.canfdclk.div" option="board.clock.canfdclk.div.8"/>
<node id="board.clock.i3cclk.div" option="board.clock.i3cclk.div.3"/>
<node id="board.clock.uck.div" option="board.clock.uck.div.5"/>
<node id="board.clock.u60ck.div" option="board.clock.u60ck.div.5"/>
<node id="board.clock.octaspiclk.div" option="board.clock.octaspiclk.div.4"/>
<node id="board.clock.cpuclk.display" option="board.clock.cpuclk.display.value"/>
<node id="board.clock.iclk.display" option="board.clock.iclk.display.value"/>
<node id="board.clock.pclka.display" option="board.clock.pclka.display.value"/>
<node id="board.clock.pclkb.display" option="board.clock.pclkb.display.value"/>
<node id="board.clock.pclkc.display" option="board.clock.pclkc.display.value"/>
<node id="board.clock.pclkd.display" option="board.clock.pclkd.display.value"/>
<node id="board.clock.pclke.display" option="board.clock.pclke.display.value"/>
<node id="board.clock.sdclkout.display" option="board.clock.sdclkout.display.value"/>
<node id="board.clock.bclk.display" option="board.clock.bclk.display.value"/>
<node id="board.clock.bclkout.display" option="board.clock.bclkout.display.value"/>
<node id="board.clock.fclk.display" option="board.clock.fclk.display.value"/>
<node id="board.clock.clkout.display" option="board.clock.clkout.display.value"/>
<node id="board.clock.sciclk.display" option="board.clock.sciclk.display.value"/>
<node id="board.clock.spiclk.display" option="board.clock.spiclk.display.value"/>
<node id="board.clock.canfdclk.display" option="board.clock.canfdclk.display.value"/>
<node id="board.clock.i3cclk.display" option="board.clock.i3cclk.display.value"/>
<node id="board.clock.uck.display" option="board.clock.uck.display.value"/>
<node id="board.clock.u60ck.display" option="board.clock.u60ck.display.value"/>
<node id="board.clock.octaspiclk.display" option="board.clock.octaspiclk.display.value"/>
</raClockConfiguration>
<raPinConfiguration>
<pincfg active="true" name="" symbol="">
<configSetting altId="adc0.an000.p004" configurationId="adc0.an000"/>
<configSetting altId="adc0.an001.p005" configurationId="adc0.an001"/>
<configSetting altId="adc0.an004.p007" configurationId="adc0.an004"/>
<configSetting altId="adc0.an007.p014" configurationId="adc0.an007"/>
<configSetting altId="adc1.an102.p002" configurationId="adc1.an102"/>
<configSetting altId="adc1.an104.p003" configurationId="adc1.an104"/>
<configSetting altId="adc1.an105.p015" configurationId="adc1.an105"/>
<configSetting altId="adc1.an106.p011" configurationId="adc1.an106"/>
<configSetting altId="ether_rmii.et0_linksta.p403" configurationId="ether_rmii.et0_linksta" isUsedByDriver="true"/>
<configSetting altId="ether_rmii.et0_mdc.p401" configurationId="ether_rmii.et0_mdc" isUsedByDriver="true"/>
<configSetting altId="ether_rmii.et0_mdio.p402" configurationId="ether_rmii.et0_mdio" isUsedByDriver="true"/>
<configSetting altId="ether_rmii.ref50ck0.p701" configurationId="ether_rmii.ref50ck0" isUsedByDriver="true"/>
<configSetting altId="ether_rmii.rmii0_crs_dv.p705" configurationId="ether_rmii.rmii0_crs_dv" isUsedByDriver="true"/>
<configSetting altId="ether_rmii.rmii0_rx_er.p704" configurationId="ether_rmii.rmii0_rx_er" isUsedByDriver="true"/>
<configSetting altId="ether_rmii.rmii0_rxd0.p702" configurationId="ether_rmii.rmii0_rxd0" isUsedByDriver="true"/>
<configSetting altId="ether_rmii.rmii0_rxd1.p703" configurationId="ether_rmii.rmii0_rxd1" isUsedByDriver="true"/>
<configSetting altId="ether_rmii.rmii0_txd0.p700" configurationId="ether_rmii.rmii0_txd0" isUsedByDriver="true"/>
<configSetting altId="ether_rmii.rmii0_txd1.p406" configurationId="ether_rmii.rmii0_txd1" isUsedByDriver="true"/>
<configSetting altId="ether_rmii.rmii0_txd_en.p405" configurationId="ether_rmii.rmii0_txd_en" isUsedByDriver="true"/>
<configSetting altId="iic1.scl1.p512" configurationId="iic1.scl1"/>
<configSetting altId="iic1.sda1.p511" configurationId="iic1.sda1"/>
<configSetting altId="irq12.irq12_dash_ds.p008" configurationId="irq12.irq12_dash_ds"/>
<configSetting altId="irq13.irq13_dash_ds.p009" configurationId="irq13.irq13_dash_ds"/>
<configSetting altId="jtag_fslash_swd.tck.p211" configurationId="jtag_fslash_swd.tck"/>
<configSetting altId="jtag_fslash_swd.tdi.p208" configurationId="jtag_fslash_swd.tdi"/>
<configSetting altId="jtag_fslash_swd.tdo.p209" configurationId="jtag_fslash_swd.tdo"/>
<configSetting altId="jtag_fslash_swd.tms.p210" configurationId="jtag_fslash_swd.tms"/>
<configSetting altId="ospi.om_cs1.p104" configurationId="ospi.om_cs1"/>
<configSetting altId="ospi.om_dqs.p801" configurationId="ospi.om_dqs"/>
<configSetting altId="ospi.om_ecsint1.p105" configurationId="ospi.om_ecsint1"/>
<configSetting altId="ospi.om_reset.p106" configurationId="ospi.om_reset"/>
<configSetting altId="ospi.om_sclk.p808" configurationId="ospi.om_sclk"/>
<configSetting altId="ospi.om_sio0.p100" configurationId="ospi.om_sio0"/>
<configSetting altId="ospi.om_sio1.p803" configurationId="ospi.om_sio1"/>
<configSetting altId="ospi.om_sio2.p103" configurationId="ospi.om_sio2"/>
<configSetting altId="ospi.om_sio3.p101" configurationId="ospi.om_sio3"/>
<configSetting altId="ospi.om_sio4.p102" configurationId="ospi.om_sio4"/>
<configSetting altId="ospi.om_sio5.p800" configurationId="ospi.om_sio5"/>
<configSetting altId="ospi.om_sio6.p802" configurationId="ospi.om_sio6"/>
<configSetting altId="ospi.om_sio7.p804" configurationId="ospi.om_sio7"/>
<configSetting altId="p000.input" configurationId="p000"/>
<configSetting altId="p107.output.low" configurationId="p107"/>
<configSetting altId="p414.output.low" configurationId="p414"/>
<configSetting altId="p600.output.low" configurationId="p600"/>
<configSetting altId="p809.output.low" configurationId="p809"/>
<configSetting altId="pa06.input" configurationId="pa06"/>
<configSetting altId="sci2.cts_rts2.pa05" configurationId="sci2.cts_rts2"/>
<configSetting altId="sci2.rxd2.pa02" configurationId="sci2.rxd2"/>
<configSetting altId="sci2.sck2.pa04" configurationId="sci2.sck2"/>
<configSetting altId="sci2.txd2.pa03" configurationId="sci2.txd2"/>
<configSetting altId="sci9.rxd9.pa15" configurationId="sci9.rxd9"/>
<configSetting altId="sci9.txd9.pa14" configurationId="sci9.txd9"/>
<configSetting altId="spi1.miso1.p410" configurationId="spi1.miso1"/>
<configSetting altId="spi1.mosi1.p411" configurationId="spi1.mosi1"/>
<configSetting altId="spi1.rspck1.p412" configurationId="spi1.rspck1"/>
<configSetting altId="spi1.sslb0.p413" configurationId="spi1.sslb0"/>
<configSetting altId="usbfs.usb_dm.p815" configurationId="usbfs.usb_dm"/>
<configSetting altId="usbfs.usb_dp.p814" configurationId="usbfs.usb_dp"/>
<configSetting altId="usbfs.usb_ovrcura.p501" configurationId="usbfs.usb_ovrcura"/>
<configSetting altId="usbfs.usb_vbus.p407" configurationId="usbfs.usb_vbus"/>
<configSetting altId="usbfs.usb_vbusen.p500" configurationId="usbfs.usb_vbusen"/>
<configSetting altId="usbhs.usbhs_ovrcura.p409" configurationId="usbhs.usbhs_ovrcura"/>
<configSetting altId="usbhs.usbhs_vbus.pb01" configurationId="usbhs.usbhs_vbus"/>
<configSetting altId="usbhs.usbhs_vbusen.p408" configurationId="usbhs.usbhs_vbusen"/>
</pincfg>
</raPinConfiguration>
</raConfiguration>
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