This repo is a platform for fellow AMD engineers to solve this puzzle with fastest runtime. It is for fun !

UBC ELEC 421 - 2024 - final proejct repository. Done with a group of 6

Convolution Neural Network for analyzing EEG signals - from OpenNeuro dataset: ds004362

Speech video analytics

Verilog code to implement the selection sort algorithm in Verilog, on a DE1-SOC FPGA

This project was a nice idea I had to build a digital logic clock on the DE1-SOC FPGA, while practicing System-verilog, Asynchronous design, and advanced debugging techniques

Exercises from Textbook "A2Z c programming" - Ch 10 'Interesting Programs'

This project was done during course ELEC 291 at UBC (University of British Columbia) in February 2022.

This repo includes various ESP-32 u-processor projects

The code in this repo can be used to help explore new hardware