GitHub - makinbacon21/de0-cv-vga-test: A (mostly) working Verilog example that loads an image into RAM and displays it via VGA

makinbacon21 / de0-cv-vga-test Public

A (mostly) working Verilog example that loads an image into RAM and displays it via VGA

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Name		Name	Last commit message	Last commit date
Latest commit History 7 Commits
Sdram_Control		Sdram_Control
V		V
VGA_DATA		VGA_DATA
demo_batch		demo_batch
greybox_tmp		greybox_tmp
hc_output		hc_output
.gitignore		.gitignore
DE0_CV_Default.cdf		DE0_CV_Default.cdf
DE0_CV_Default.pti_db_list.ddb		DE0_CV_Default.pti_db_list.ddb
DE0_CV_Default.qpf		DE0_CV_Default.qpf
DE0_CV_Default.qsf		DE0_CV_Default.qsf
DE0_CV_Default.sdc		DE0_CV_Default.sdc
DE0_CV_Default.sld		DE0_CV_Default.sld
DE0_CV_Default.tis_db_list.ddb		DE0_CV_Default.tis_db_list.ddb
DE0_CV_Default.v		DE0_CV_Default.v
DE0_CV_Default_assignment_defaults.qdf		DE0_CV_Default_assignment_defaults.qdf
PLLJ_PLLSPE_INFO.txt		PLLJ_PLLSPE_INFO.txt
c5_pin_model_dump.txt		c5_pin_model_dump.txt
no_rev.pti_db_list.ddb		no_rev.pti_db_list.ddb
pll_test.xml		pll_test.xml
sdram_pll0.xml		sdram_pll0.xml
stp1.stp		stp1.stp
vga_pll.xml		vga_pll.xml