- Bloomington, Indiana, US
- http://www.lucasbrasilino.com
- @lucas_brasilino
- https://scholar.google.com/citations?user=vXVi04oAAAAJ
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axis_exec_op
axis_exec_op PublicVerilog module for executing logic operations over AXI4-Stream interface data.
Verilog 9
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cocotbext-blk-mem-gen
cocotbext-blk-mem-gen PublicXilinx Block Memory Generator Model for Cocotb
Verilog 1
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ZCU102-Ethernet
ZCU102-Ethernet PublicForked from Xilinx-Wiki-Projects/ZCU102-Ethernet
Fork from Xilinx's repo plus designs ported to other Vivado versions.
C
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axi_ethernet_bridge
axi_ethernet_bridge PublicA bridge IP for interconnecting Xilinx's AXI Ethernet Subsystems (used with EthernetFMC).
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uioctl
uioctl PublicForked from leaflabs/uioctl
utility for debugging Linux UIO ("Userspace I/O") devices
C
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