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[hmac,dv] Adjust stress_all parameters #26247

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Feb 12, 2025
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7 changes: 7 additions & 0 deletions hw/ip/hmac/dv/env/seq_lib/hmac_stress_all_vseq.sv
Original file line number Diff line number Diff line change
Expand Up @@ -7,12 +7,19 @@
class hmac_stress_all_vseq extends hmac_base_vseq;
`uvm_object_utils(hmac_stress_all_vseq)

// Constraints
extern constraint num_trans_c;

// Standard SV/UVM methods
extern function new(string name="");
extern task body();
endclass : hmac_stress_all_vseq


constraint hmac_stress_all_vseq::num_trans_c {
num_trans inside {[1:10]};
}

function hmac_stress_all_vseq::new(string name="");
super.new(name);
endfunction : new
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2 changes: 1 addition & 1 deletion hw/ip/hmac/dv/hmac_sim_cfg.hjson
Original file line number Diff line number Diff line change
Expand Up @@ -146,7 +146,7 @@
{
// Append the common stress_tests.hjson entry for more run_opts.
name: hmac_stress_all_with_rand_reset
reseed: 10
reseed: 25
}

{
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